soc: mcxw: Add LPIT support

Enable LPIT peripheral on MCXW7x socs.

Signed-off-by: Declan Snyder <[email protected]>

Author: decsny

dts/arm/nxp/nxp_mcxw7x_common.dtsi

@@ -139,6 +139,41 @@
 		clocks = <&scg SCG_K4_SLOW_CLK 0>;
 	};
 
+	lpit0: timer@2f000 {
+		compatible = "nxp,lpit";
+		reg = <0x2f000 0x60>;
+		interrupts = <36 0>;
+		clocks = <&scg SCG_K4_FIRC_CLK 0xbc>;
+		status = "disabled";
+		max-load-value = <0xffffffff>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		lpit1_channel0: lpit_channel@0 {
+			compatible = "nxp,lpit-channel";
+			reg = <0>;
+			status = "disabled";
+		};
+
+		lpit1_channel1: lpit_channel@1 {
+			compatible = "nxp,lpit-channel";
+			reg = <1>;
+			status = "disabled";
+		};
+
+		lpit1_channel2: lpit_channel@2 {
+			compatible = "nxp,lpit-channel";
+			reg = <2>;
+			status = "disabled";
+		};
+
+		lpit1_channel3: lpit_channel@3 {
+			compatible = "nxp,lpit-channel";
+			reg = <3>;
+			status = "disabled";
+		};
+	};
+
 	lpuart0: serial@38000 {
 		compatible = "nxp,lpuart";
 		reg = <0x38000 0x34>;

soc/nxp/mcx/mcxw/soc.c

@@ -121,6 +121,7 @@ __weak void clock_init(void)
 	CLOCK_SetIpSrc(kCLOCK_Lpspi0, kCLOCK_IpSrcFro192M);
 	CLOCK_SetIpSrc(kCLOCK_Lpspi1, kCLOCK_IpSrcFro192M);
 	CLOCK_SetIpSrc(kCLOCK_Can0, kCLOCK_IpSrcFro192M);
+	CLOCK_SetIpSrc(kCLOCK_Lpit0, kCLOCK_IpSrcFro192M);
 	CLOCK_SetIpSrc(kCLOCK_Tpm0, kCLOCK_IpSrcFro192M);
 	CLOCK_SetIpSrc(kCLOCK_Tpm1, kCLOCK_IpSrcFro192M);
 	CLOCK_SetIpSrc(kCLOCK_Lpi2c0, kCLOCK_IpSrcFro192M);
@@ -155,6 +156,10 @@ __weak void clock_init(void)
 		CLOCK_EnableClock(kCLOCK_Lpuart1);
 	}
 
+	if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(tpm0), nxp_lpit, okay)) {
+		CLOCK_EnableClock(kCLOCK_Lpit0);
+	}
+
 	if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(tpm0), nxp_kinetis_tpm, okay)) {
 		CLOCK_EnableClock(kCLOCK_Tpm0);
 	}

tests/drivers/counter/counter_basic_api/boards/frdm_mcxw71.overlay

@@ -7,3 +7,19 @@
 &lptmr1 {
 	status = "okay";
 };
+
+&lpit0 {
+	status = "okay";
+};
+
+&lpit1_channel0 {
+	status = "okay";
+};
+
+&lpit1_channel1 {
+	status = "okay";
+};
+
+&lpit1_channel3 {
+	status = "okay";
+};

tests/drivers/counter/counter_basic_api/boards/frdm_mcxw72_mcxw727c_cpu0.overlay

@@ -0,0 +1,21 @@
+/*
+ * Copyright 2024 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&lpit0 {
+	status = "okay";
+};
+
+&lpit1_channel0 {
+	status = "okay";
+};
+
+&lpit1_channel1 {
+	status = "okay";
+};
+
+&lpit1_channel3 {
+	status = "okay";
+};