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drivers: can: flexcan: fix timing parameter limits
Fix the limits for the timing parameter calculations. The lower limit for the phase_seg2 value is wrongly specified as 1 to 7, but 1U is substracted before writing it to the CTRL1:PSEG2 register field. This results in register field values between 0 and 6, but 0 is an invalid value for the PSEG2 register field. The upper limits for several of the timing parameters are wrong as well, but this does not result in invalid register field values being calculated. It can, however, result in not being able to meet CAN timing requirements. The confusion in specifying the limits likely stems from the timing calculations and timing limits using the "physical" values, whereas the registers fields all use the "physical" value minus 1. When the datasheet says "The valid programmable values are 1-7", the corresponding limits should be set to 2 to 8 to take the "minus 1" into account. Fixes: #39541 Signed-off-by: Henrik Brix Andersen <[email protected]>
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drivers/can/can_mcux_flexcan.c

Lines changed: 16 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -747,19 +747,28 @@ static const struct can_driver_api mcux_flexcan_driver_api = {
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#endif
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.register_state_change_isr = mcux_flexcan_register_state_change_isr,
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.get_core_clock = mcux_flexcan_get_core_clock,
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/*
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* FlexCAN timing limits are specified in the "FLEXCANx_CTRL1 field
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* descriptions" table in the SoC reference manual.
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*
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* Note that the values here are the "physical" timing limits, whereas
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* the register field limits are physical values minus 1 (which is
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* handled by the flexcan_config_t field assignments elsewhere in this
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* driver).
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*/
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.timing_min = {
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.sjw = 0x1,
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.sjw = 0x01,
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.prop_seg = 0x01,
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.phase_seg1 = 0x01,
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.phase_seg2 = 0x01,
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.phase_seg2 = 0x02,
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.prescaler = 0x01
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},
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.timing_max = {
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.sjw = 0x03,
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.prop_seg = 0x07,
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.phase_seg1 = 0x07,
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.phase_seg2 = 0x07,
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.prescaler = 0xFF
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.sjw = 0x04,
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.prop_seg = 0x08,
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.phase_seg1 = 0x08,
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.phase_seg2 = 0x08,
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.prescaler = 0x100
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}
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};
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