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2 | 2 | * Copyright (c) 2021 Intel Corporation
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3 | 3 | * SPDX-License-Identifier: Apache-2.0
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4 | 4 | */
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| 5 | + |
| 6 | +#include <cpuid.h> /* Header provided by the toolchain. */ |
| 7 | + |
5 | 8 | #include <zephyr/init.h>
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| 9 | +#include <zephyr/arch/x86/cpuid.h> |
6 | 10 | #include <zephyr/drivers/timer/system_timer.h>
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7 | 11 | #include <zephyr/sys_clock.h>
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8 | 12 | #include <zephyr/spinlock.h>
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@@ -149,28 +153,21 @@ void smp_timer_init(void)
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149 | 153 | irq_enable(timer_irq());
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150 | 154 | }
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151 | 155 |
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152 |
| -static inline void cpuid(uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) |
153 |
| -{ |
154 |
| - __asm__ volatile("cpuid" |
155 |
| - : "=b"(*ebx), "=c"(*ecx), "=d"(*edx) |
156 |
| - : "a"(*eax), "c"(*ecx)); |
157 |
| -} |
158 |
| - |
159 | 156 | static int sys_clock_driver_init(void)
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160 | 157 | {
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161 | 158 | #ifdef CONFIG_ASSERT
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162 | 159 | uint32_t eax, ebx, ecx, edx;
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163 | 160 |
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164 |
| - eax = 1; ecx = 0; |
165 |
| - cpuid(&eax, &ebx, &ecx, &edx); |
| 161 | + ecx = 0; /* prevent compiler warning */ |
| 162 | + __get_cpuid(CPUID_BASIC_INFO_1, &eax, &ebx, &ecx, &edx); |
166 | 163 | __ASSERT((ecx & BIT(24)) != 0, "No TSC Deadline support");
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167 | 164 |
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168 |
| - eax = 0x80000007; ecx = 0; |
169 |
| - cpuid(&eax, &ebx, &ecx, &edx); |
| 165 | + edx = 0; /* prevent compiler warning */ |
| 166 | + __get_cpuid(0x80000007, &eax, &ebx, &ecx, &edx); |
170 | 167 | __ASSERT((edx & BIT(8)) != 0, "No Invariant TSC support");
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171 | 168 |
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172 |
| - eax = 7; ecx = 0; |
173 |
| - cpuid(&eax, &ebx, &ecx, &edx); |
| 169 | + ebx = 0; /* prevent compiler warning */ |
| 170 | + __get_cpuid_count(CPUID_EXTENDED_FEATURES_LVL, 0, &eax, &ebx, &ecx, &edx); |
174 | 171 | __ASSERT((ebx & BIT(1)) != 0, "No TSC_ADJUST MSR support");
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175 | 172 | #endif
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176 | 173 |
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