drivers: intc_wch_pfic: correct/optimize interrupt disable logic

kartben · kartben · commit b15f942684c8 · 2025-06-11T08:18:58.000+02:00
The IRER registers are write-only and clear the enable bit for the
provided interrupt. Use a direct write instead of a read/modify/write
sequence to avoid generating a bogus read access and improve performance

Signed-off-by: Benjamin Cabé &lt;benjamin@zephyrproject.org&gt;
diff --git a/drivers/interrupt_controller/intc_wch_pfic.c b/drivers/interrupt_controller/intc_wch_pfic.c
@@ -23,7 +23,7 @@ void arch_irq_enable(unsigned int irq)
 
 void arch_irq_disable(unsigned int irq)
 {
-	PFIC->IRER[irq / 32] |= 1 << (irq % 32);
+	PFIC->IRER[irq / 32] = 1 << (irq % 32);
 }
 
 int arch_irq_is_enabled(unsigned int irq)

Original file line number	Diff line number	Diff line change
`@@ -23,7 +23,7 @@ void arch_irq_enable(unsigned int irq)`
`23`	`23`
`24`	`24`	`void arch_irq_disable(unsigned int irq)`
`25`	`25`	`{`
`26`		`- PFIC->IRER[irq / 32] \|= 1 << (irq % 32);`
	`26`	`+ PFIC->IRER[irq / 32] = 1 << (irq % 32);`
`27`	`27`	`}`
`28`	`28`
`29`	`29`	`int arch_irq_is_enabled(unsigned int irq)`