modules: hal_silabs: wiseconnect: CMakeLists update

This update fixes build system integration for PSRAM features by
adding rsi_d_cache.c to the sources and required compile definitions,
ensuring full support for half-sleep and LDO functionality.

Signed-off-by: S Mohamed Fiaz <[email protected]>

Author: fimohame

modules/hal_silabs/wiseconnect/CMakeLists.txt

@@ -105,10 +105,18 @@ zephyr_library_sources_ifdef(CONFIG_ENTROPY_SILABS_SIWX91X
   ${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_rng.c
 )
 
-zephyr_library_sources_ifdef(CONFIG_MEMC_SILABS_SIWX91X_QSPI
-  ${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_psram.c
-  ${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_qspi.c
-)
+if(CONFIG_MEMC_SILABS_SIWX91X_QSPI)
+  zephyr_library_sources(
+    ${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/unified_api/src/sl_si91x_psram.c
+    ${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/rsi_qspi.c
+    ${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/unified_api/src/rsi_d_cache.c
+  )
+  zephyr_compile_definitions(
+    SLI_SI91X_MCU_PSRAM_PRESENT
+    SLI_SI91X_MCU_ENABLE_PSRAM_FEATURE
+    SL_SI91X_REQUIRES_INTF_PLL
+  )
+endif() # CONFIG_MEMC_SILABS_SIWX91X_QSPI
 
 if(CONFIG_WIFI_SILABS_SIWX91X)
   zephyr_library_sources(