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gmarulljhedberg
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soc: sifli: sf32: sf32lb52x: allow configuring bootrom flash delays
Boot ROM will by default set on/off delays to 0ms before jumping to firmware. This patch adds an option to to configure the on/off delays to non-zero values. A flash power cycle guarantees to put the external flash into a known state before executing code from it. This is required if using 4-byte address mode in the external flash, as the boot ROM will always use 3-byte address mode when reading from external flash, causing a potential deadlock situation requiring a power-cycle (known errata). Signed-off-by: Gerard Marull-Paretas <[email protected]>
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soc/sifli/sf32/sf32lb52x/Kconfig

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@@ -11,3 +11,28 @@ config SOC_SERIES_SF32LB52X
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select CPU_HAS_ICACHE
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select CPU_HAS_DCACHE
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select SOC_EARLY_INIT_HOOK
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if SOC_SERIES_SF32LB52X
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config SF32LB52X_BOOTROM_FLASH_ON_DELAY_MS
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int "Boot ROM flash on delay (ms)"
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default 0
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range 0 4095
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help
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Configure boot ROM flash on delay (PA21) in milliseconds. Boot ROM
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will by default set on/off delays to 0ms before jumping to firmware.
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Enabling this option allows to configure the on/off delays to non-zero
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values. A flash power cycle guarantees to put the external flash into
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a known state before executing code from it. This is required if using
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4-byte address mode in the external flash, as the boot ROM will always
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use 3-byte address mode when reading from external flash.
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config SF32LB52X_BOOTROM_FLASH_OFF_DELAY_MS
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int "Boot ROM flash off delay (ms)"
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default 0
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range 0 255
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help
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Configure boot ROM flash off delay (PA21) in milliseconds. See
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SF32LB52X_BOOTROM_FLASH_ON_DELAY_MS help for more details.
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endif # SOC_SERIES_SF32LB52X

soc/sifli/sf32/sf32lb52x/soc.c

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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/arch/cpu.h>
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#include <zephyr/cache.h>
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#include <zephyr/sys/util.h>
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#define BOOTROM_BKP_REG DT_REG_ADDR(DT_INST(0, sifli_sf32lb_rtc_backup))
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#define BOOTROM_FLASH_OFF_DELAY_MSK GENMASK(11U, 4U)
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#define BOOTROM_FLASH_ON_DELAY_MSK GENMASK(23U, 12U)
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void soc_early_init_hook(void)
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{
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sys_cache_instr_enable();
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sys_cache_data_enable();
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#if CONFIG_SF32LB52X_BOOTROM_FLASH_ON_DELAY_MS > 0 || \
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CONFIG_SF32LB52X_BOOTROM_FLASH_OFF_DELAY_MS > 0
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uint32_t val;
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val = sys_read32(BOOTROM_BKP_REG);
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val &= ~(BOOTROM_FLASH_OFF_DELAY_MSK | BOOTROM_FLASH_ON_DELAY_MSK);
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val |= FIELD_PREP(BOOTROM_FLASH_OFF_DELAY_MSK,
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CONFIG_SF32LB52X_BOOTROM_FLASH_OFF_DELAY_MS) |
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FIELD_PREP(BOOTROM_FLASH_ON_DELAY_MSK, CONFIG_SF32LB52X_BOOTROM_FLASH_ON_DELAY_MS);
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sys_write32(val, BOOTROM_BKP_REG);
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#endif
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}

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