Skip to content

Commit b64c69f

Browse files
rriveramcruscarlescufi
authored andcommitted
regulator: cp9314: Drops B0 silicon support
Removes support for B0 revision silicon. The B0 revision is no longer recommended for use in host-controlled applications and there are no users of this driver implementing B0 silicon in their final design. Signed-off-by: Ricardo Rivera-Matos <[email protected]>
1 parent 2b3ed70 commit b64c69f

File tree

1 file changed

+0
-48
lines changed

1 file changed

+0
-48
lines changed

drivers/regulator/regulator_cp9314.c

Lines changed: 0 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -119,7 +119,6 @@ LOG_MODULE_REGISTER(CP9314, CONFIG_REGULATOR_LOG_LEVEL);
119119

120120
#define CP9314_REG_BC_STS_C 0x62
121121
#define CP9314_CHIP_REV_MASK GENMASK(7, 4)
122-
#define CP9314_CHIP_REV_B0 0x1
123122
#define CP9314_CHIP_REV_B1 0x3
124123

125124
#define CP9314_REG_FORCE_SC_MISC 0x69
@@ -222,31 +221,6 @@ struct cp9314_reg_patch {
222221
uint8_t value;
223222
};
224223

225-
/*
226-
* HW errata patch for B0 silicon. Intended to correct POR configuration values for protection
227-
* comparators, disable OCP comparators, and enable the output undervoltage comparator.
228-
*/
229-
static struct cp9314_reg_patch b0_reg_patch[18] = {
230-
{CP9314_REG_CRUS_CTRL, GENMASK(7, 0), CP9314_CRUS_KEY_UNLOCK},
231-
{CP9314_REG_LION_COMP_CTRL_3, CP9314_VIN_OV_CFG, 0x1B},
232-
{CP9314_REG_LION_COMP_CTRL_1, CP9314_VOUT_OV_CFG_0, 0x30},
233-
{CP9314_REG_LION_COMP_CTRL_2, CP9314_VOUT_OV_CFG_1, 0xC},
234-
{CP9314_REG_VIN2OUT_OVP, CP9314_VIN2OUT_OVP, 0x2},
235-
{CP9314_REG_VIN2OUT_UVP, CP9314_VIN2OUT_UVP, 0x1},
236-
{CP9314_REG_VOUT_UVP, CP9314_VOUT_UVP_DIS, 0},
237-
{CP9314_REG_VOUT_UVP, CP9314_VOUT_UVP, 0},
238-
{CP9314_REG_LION_COMP_CTRL_1, CP9314_VIN_SWITCH_OK_DIS_0, 0},
239-
{CP9314_REG_LION_COMP_CTRL_4, CP9314_VIN_SWITCH_OK_DIS_1, 0},
240-
{CP9314_REG_LION_COMP_CTRL_1, CP9314_VIN_SWITCH_OK_CFG, 0},
241-
{CP9314_REG_LION_CFG_3, CP9314_LB_MIN_FREQ_SEL_0, 0x80},
242-
{CP9314_REG_LB_CTRL, CP9314_LB_MIN_FREQ_SEL_1, 0x4},
243-
{CP9314_REG_TRIM_8, CP9314_MODE_CTRL_UPDATE_BW_0, 0x2},
244-
{CP9314_REG_LION_CFG_3, CP9314_MODE_CTRL_UPDATE_BW_1, 0x2},
245-
{CP9314_REG_IIN_OCP, CP9314_IIN_OCP_DIS, CP9314_IIN_OCP_DIS},
246-
{CP9314_REG_IIN_PEAK_OCP, CP9314_IIN_PEAK_OCP_DIS, CP9314_IIN_PEAK_OCP_DIS},
247-
{CP9314_REG_CRUS_CTRL, GENMASK(7, 0), CP9314_CRUS_KEY_LOCK},
248-
};
249-
250224
/* OTP memory errata patch for OTP v1. Corrects trim errata. */
251225
static struct cp9314_reg_patch otp_1_patch[3] = {
252226
{CP9314_REG_OPTION_REG_1, CP9314_LB1_DELAY_CFG, 0},
@@ -468,22 +442,6 @@ static int cp9314_cfg_sync(const struct device *dev)
468442
CP9314_FRC_SYNC_MODE);
469443
}
470444

471-
static int regulator_cp9314_b0_init(const struct device *dev)
472-
{
473-
const struct regulator_cp9314_config *config = dev->config;
474-
int ret;
475-
476-
for (size_t i = 0U; i < ARRAY_SIZE(b0_reg_patch); i++) {
477-
ret = i2c_reg_update_byte_dt(&config->i2c, b0_reg_patch[i].reg_addr,
478-
b0_reg_patch[i].mask, b0_reg_patch[i].value);
479-
if (ret < 0) {
480-
return ret;
481-
}
482-
}
483-
484-
return 0;
485-
}
486-
487445
static int cp9314_do_soft_reset(const struct device *dev)
488446
{
489447
const struct regulator_cp9314_config *config = dev->config;
@@ -645,12 +603,6 @@ static int regulator_cp9314_init(const struct device *dev)
645603
value = FIELD_GET(CP9314_CHIP_REV_MASK, value);
646604

647605
switch (value) {
648-
case CP9314_CHIP_REV_B0:
649-
ret = regulator_cp9314_b0_init(dev);
650-
if (ret < 0) {
651-
return ret;
652-
}
653-
break;
654606
case CP9314_CHIP_REV_B1:
655607
break;
656608
default:

0 commit comments

Comments
 (0)