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AlessandroLuokartben
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drivers: adc: Add support for Apollo510 ADC
This commit adds support for Apollo510 SoC in ambiq adc driver Signed-off-by: Hao Luo <[email protected]>
1 parent 3c7e43f commit ba52a93

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7 files changed

+98
-7
lines changed

7 files changed

+98
-7
lines changed

boards/ambiq/apollo510_evb/apollo510_evb-pinctrl.dtsi

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,13 @@
2424
};
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};
2626

27+
adc0_default: adc0_default{
28+
group1 {
29+
pinmux = <ADCSE4_P15>, <ADCSE7_P12>;
30+
drive-strength = "0.1";
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};
32+
};
33+
2734
i2c0_default: i2c0_default {
2835
group1 {
2936
pinmux = <M0SCL_P5>, <M0SDAWIR3_P6>;

boards/ambiq/apollo510_evb/apollo510_evb.dts

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Original file line numberDiff line numberDiff line change
@@ -89,6 +89,12 @@
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pinctrl-names = "default";
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};
9191

92+
&adc0 {
93+
pinctrl-0 = <&adc0_default>;
94+
pinctrl-names = "default";
95+
status = "disabled";
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};
97+
9298
&counter0 {
9399
status = "disabled";
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};

boards/ambiq/apollo510_evb/apollo510_evb.yaml

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Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@ toolchain:
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- gnuarmemb
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supported:
1111
- uart
12+
- adc
1213
- watchdog
1314
- counter
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- gpio

drivers/adc/adc_ambiq.c

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,7 @@ static int adc_ambiq_set_resolution(am_hal_adc_slot_prec_e *prec, uint8_t adc_re
5252
case 12:
5353
*prec = AM_HAL_ADC_SLOT_12BIT;
5454
break;
55-
#if !defined(CONFIG_SOC_SERIES_APOLLO4X)
55+
#if defined(CONFIG_SOC_SERIES_APOLLO3X)
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case 14:
5757
*prec = AM_HAL_ADC_SLOT_14BIT;
5858
break;
@@ -80,7 +80,7 @@ static int adc_ambiq_slot_config(const struct device *dev, const struct adc_sequ
8080
ADCSlotConfig.eChannel = channel;
8181
ADCSlotConfig.bWindowCompare = false;
8282
ADCSlotConfig.bEnabled = true;
83-
#if defined(CONFIG_SOC_SERIES_APOLLO4X)
83+
#if !defined(CONFIG_SOC_SERIES_APOLLO3X)
8484
ADCSlotConfig.ui32TrkCyc = AM_HAL_ADC_MIN_TRKCYC;
8585
#endif
8686
if (AM_HAL_STATUS_SUCCESS !=
@@ -101,8 +101,6 @@ static void adc_ambiq_isr(const struct device *dev)
101101

102102
/* Read the interrupt status. */
103103
am_hal_adc_interrupt_status(data->adcHandle, &ui32IntMask, true);
104-
/* Clear the ADC interrupt.*/
105-
am_hal_adc_interrupt_clear(data->adcHandle, ui32IntMask);
106104

107105
/*
108106
* If we got a conversion completion interrupt (which should be our only
@@ -119,6 +117,8 @@ static void adc_ambiq_isr(const struct device *dev)
119117
am_hal_adc_disable(data->adcHandle);
120118
adc_context_on_sampling_done(&data->ctx, dev);
121119
}
120+
/* Clear the ADC interrupt.*/
121+
am_hal_adc_interrupt_clear(data->adcHandle, ui32IntMask);
122122
}
123123

124124
static int adc_ambiq_check_buffer_size(const struct adc_sequence *sequence, uint8_t active_channels)
@@ -280,9 +280,9 @@ static int adc_ambiq_init(const struct device *dev)
280280

281281
/* Initialize the ADC and get the handle*/
282282
if (AM_HAL_STATUS_SUCCESS !=
283-
am_hal_adc_initialize((cfg->base - ADC_BASE) / (cfg->size * 4), &data->adcHandle)) {
283+
am_hal_adc_initialize(0, &data->adcHandle)) {
284284
ret = -ENODEV;
285-
LOG_ERR("Faile to initialize ADC, code:%d", ret);
285+
LOG_ERR("Failed to initialize ADC, code:%d", ret);
286286
return ret;
287287
}
288288

@@ -292,7 +292,7 @@ static int adc_ambiq_init(const struct device *dev)
292292
/* Set up the ADC configuration parameters. These settings are reasonable
293293
* for accurate measurements at a low sample rate.
294294
*/
295-
#if !defined(CONFIG_SOC_SERIES_APOLLO4X)
295+
#if defined(CONFIG_SOC_SERIES_APOLLO3X)
296296
ADCConfig.eClock = AM_HAL_ADC_CLKSEL_HFRC;
297297
ADCConfig.eReference = AM_HAL_ADC_REFSEL_INT_1P5;
298298
#else

dts/arm/ambiq/ambiq_apollo510.dtsi

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Original file line numberDiff line numberDiff line change
@@ -549,6 +549,17 @@
549549
status = "disabled";
550550
};
551551

552+
adc0: adc@ADC_BASE_NAME {
553+
compatible = "ambiq,adc";
554+
reg = <ADC_REG_BASE ADC_REG_SIZE>;
555+
interrupts = <19 0>;
556+
interrupt-names = "ADC";
557+
channel-count = <10>;
558+
internal-vref-mv = <1190>;
559+
status = "disabled";
560+
#io-channel-cells = <1>;
561+
};
562+
552563
pinctrl: pin-controller@GPIO_BASE_NAME {
553564
compatible = "ambiq,apollo5-pinctrl";
554565
reg = <GPIO_REG_BASE GPIO_REG_SIZE>;
Lines changed: 34 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,34 @@
1+
/*
2+
* Copyright (c) 2025 Ambiq Micro Inc.
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
/ {
7+
zephyr,user {
8+
io-channels = <&adc0 4>, <&adc0 7>;
9+
};
10+
};
11+
12+
&adc0 {
13+
status = "okay";
14+
interrupt-parent = <&nvic>;
15+
interrupts = <19 0>;
16+
#address-cells = <1>;
17+
#size-cells = <0>;
18+
19+
channel@4 {
20+
reg = <4>;
21+
zephyr,gain = "ADC_GAIN_1";
22+
zephyr,reference = "ADC_REF_INTERNAL";
23+
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
24+
zephyr,resolution = <12>;
25+
};
26+
27+
channel@7 {
28+
reg = <7>;
29+
zephyr,gain = "ADC_GAIN_1";
30+
zephyr,reference = "ADC_REF_INTERNAL";
31+
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
32+
zephyr,resolution = <12>;
33+
};
34+
};
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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,32 @@
1+
/*
2+
* Copyright (c) 2025 Ambiq Micro Inc.
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
/ {
7+
zephyr,user {
8+
io-channels = <&adc0 4>, <&adc0 7>;
9+
};
10+
};
11+
12+
&adc0 {
13+
status = "okay";
14+
#address-cells = <1>;
15+
#size-cells = <0>;
16+
17+
channel@4 {
18+
reg = <4>;
19+
zephyr,gain = "ADC_GAIN_1";
20+
zephyr,reference = "ADC_REF_INTERNAL";
21+
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
22+
zephyr,resolution = <12>;
23+
};
24+
25+
channel@7 {
26+
reg = <7>;
27+
zephyr,gain = "ADC_GAIN_1";
28+
zephyr,reference = "ADC_REF_INTERNAL";
29+
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
30+
zephyr,resolution = <12>;
31+
};
32+
};

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