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sylvioalvescarlescufi
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soc: esp32s3: add base source content
This brings esp32s3 linker, DTS and all necessary files to allow the soc support. Signed-off-by: Sylvio Alves <[email protected]>
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‎dts/xtensa/espressif/esp32s3.dtsi‎

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/*
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* Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <xtensa/xtensa.dtsi>
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#include <zephyr/dt-bindings/gpio/gpio.h>
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#include <zephyr/dt-bindings/clock/esp32s3_clock.h>
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#include <zephyr/dt-bindings/interrupt-controller/esp32s3-xtensa-intmux.h>
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#include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
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/ {
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chosen {
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zephyr,flash-controller = &flash;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "cdns,tensilica-xtensa-lx7";
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reg = <0>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "cdns,tensilica-xtensa-lx7";
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reg = <1>;
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};
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};
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pinctrl: pin-controller {
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compatible = "espressif,esp32-pinctrl";
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status = "okay";
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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sram0: memory@3fc88000 {
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compatible = "mmio-sram";
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reg = <0x3fc88000 0x77FFF>;
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};
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intc: interrupt-controller@600c2000 {
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#interrupt-cells = <1>;
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compatible = "espressif,esp32-intc";
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interrupt-controller;
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reg = <0x600c2000 0x1000>;
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status = "okay";
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};
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rtc: rtc@60021000 {
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compatible = "espressif,esp32-rtc";
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reg = <0x60021000 0x2000>;
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xtal-freq = <ESP32_CLK_XTAL_40M>;
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#clock-cells = <1>;
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status = "okay";
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rtc_timer: rtc_timer {
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compatible = "espressif,esp32-rtc-timer";
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slow-clk-freq = <ESP32_RTC_SLOW_CLK_FREQ_150K>;
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interrupts = <RTC_CORE_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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status = "okay";
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};
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};
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flash: flash-controller@60002000 {
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compatible = "espressif,esp32-flash-controller";
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reg = <0x60002000 0x1000>;
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/* interrupts = <3 0>; */
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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reg = <0 0x800000>;
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erase-block-size = <4096>;
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write-block-size = <4>;
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};
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};
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uart0: uart@60000000 {
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compatible = "espressif,esp32-uart";
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reg = <0x60000000 0x1000>;
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interrupts = <UART0_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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clocks = <&rtc ESP32_UART0_MODULE>;
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status = "disabled";
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};
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uart1: uart@60010000 {
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compatible = "espressif,esp32-uart";
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reg = <0x60010000 0x1000>;
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interrupts = <UART1_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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clocks = <&rtc ESP32_UART1_MODULE>;
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status = "disabled";
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};
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uart2: uart@6002e000 {
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compatible = "espressif,esp32-uart";
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reg = <0x6002e000 0x1000>;
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interrupts = <UART2_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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clocks = <&rtc ESP32_UART2_MODULE>;
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status = "disabled";
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};
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gpio: gpio {
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compatible = "simple-bus";
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gpio-map-mask = <0xffffffe0 0xffffffc0>;
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gpio-map-pass-thru = <0x1f 0x3f>;
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gpio-map = <
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0x00 0x0 &gpio0 0x0 0x0
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0x20 0x0 &gpio1 0x0 0x0
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>;
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#gpio-cells = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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gpio0: gpio@60004000 {
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compatible = "espressif,esp32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x60004000 0x800>;
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interrupts = <GPIO_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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ngpios = <32>;
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};
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gpio1: gpio@60004800 {
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compatible = "espressif,esp32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x60004800 0x800>;
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interrupts = <GPIO_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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ngpios = <13>;
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};
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};
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};
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};

‎soc/xtensa/esp32s3/CMakeLists.txt‎

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# SPDX-License-Identifier: Apache-2.0
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zephyr_sources(
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soc.c
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loader.c
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)
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zephyr_library_sources_ifdef(CONFIG_NEWLIB_LIBC newlib_fix.c)
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# get code-partition slot0 address
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dt_nodelabel(dts_partition_path NODELABEL "slot0_partition")
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dt_reg_addr(img_0_off PATH ${dts_partition_path})
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# get code-partition boot address
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dt_nodelabel(dts_partition_path NODELABEL "boot_partition")
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dt_reg_addr(boot_off PATH ${dts_partition_path})
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# get flash size to use in esptool as string
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math(EXPR esptoolpy_flashsize "${CONFIG_FLASH_SIZE} / 0x100000")
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if(CONFIG_BOOTLOADER_ESP_IDF)
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include(ExternalProject)
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## we use hello-world project, but I think any can be used.
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set(espidf_components_dir ${ESP_IDF_PATH}/components)
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set(espidf_prefix ${CMAKE_BINARY_DIR}/esp-idf)
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set(espidf_build_dir ${espidf_prefix}/build)
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ExternalProject_Add(
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EspIdfBootloader
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PREFIX ${espidf_prefix}
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SOURCE_DIR ${espidf_components_dir}/bootloader/subproject
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BINARY_DIR ${espidf_build_dir}/bootloader
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CONFIGURE_COMMAND
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${CMAKE_COMMAND} -G${CMAKE_GENERATOR}
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-S ${espidf_components_dir}/bootloader/subproject
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-B ${espidf_build_dir}/bootloader -DSDKCONFIG=${espidf_build_dir}/sdkconfig
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-DIDF_PATH=${ESP_IDF_PATH} -DIDF_TARGET=${CONFIG_SOC}
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-DPYTHON_DEPS_CHECKED=1
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-DCMAKE_C_COMPILER=${CMAKE_C_COMPILER}
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-DCMAKE_CXX_COMPILER=${CMAKE_CXX_COMPILER}
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-DCMAKE_ASM_COMPILER=${CMAKE_ASM_COMPILER}
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-DCMAKE_SYSTEM_NAME=${CMAKE_SYSTEM_NAME}
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-DPYTHON=${PYTHON_EXECUTABLE}
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BUILD_COMMAND
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${CMAKE_COMMAND} --build .
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INSTALL_COMMAND "" # This particular build system has no install command
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)
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ExternalProject_Add(
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EspPartitionTable
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SOURCE_DIR ${espidf_components_dir}/partition_table
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BINARY_DIR ${espidf_build_dir}
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CONFIGURE_COMMAND ""
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BUILD_COMMAND
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${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/components/partition_table/gen_esp32part.py -q
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--offset 0x8000 --flash-size ${esptoolpy_flashsize}MB ${ESP_IDF_PATH}/components/partition_table/partitions_singleapp.csv ${espidf_build_dir}/partitions_singleapp.bin
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INSTALL_COMMAND ""
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)
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if(CONFIG_BUILD_OUTPUT_BIN)
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set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
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COMMAND ${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/components/esptool_py/esptool/esptool.py
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ARGS --chip esp32s3 elf2image --flash_mode dio --flash_freq 40m --flash_size ${esptoolpy_flashsize}MB
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-o ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.bin
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${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf)
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endif()
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set_property(TARGET bintools PROPERTY disassembly_flag_inline_source)
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add_dependencies(app EspIdfBootloader EspPartitionTable)
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board_finalize_runner_args(esp32 "--esp-flash-bootloader=${espidf_build_dir}/bootloader/bootloader.bin")
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board_finalize_runner_args(esp32 "--esp-flash-partition_table=${espidf_build_dir}/partitions_singleapp.bin")
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board_finalize_runner_args(esp32 "--esp-partition-table-address=0x8000")
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endif()
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board_finalize_runner_args(esp32 "--esp-boot-address=${boot_off}")
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board_finalize_runner_args(esp32 "--esp-app-address=${img_0_off}")

‎soc/xtensa/esp32s3/Kconfig.defconfig‎

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# ESP32 board configuration
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# Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
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# SPDX-License-Identifier: Apache-2.0
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if SOC_ESP32S3
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if BOOTLOADER_MCUBOOT
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config HAS_FLASH_LOAD_OFFSET
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default y
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config MCUBOOT_GENERATE_UNSIGNED_IMAGE
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default y
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config MCUBOOT_GENERATE_CONFIRMED_IMAGE
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default y
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config ROM_START_OFFSET
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default 0x20
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config HAS_DYNAMIC_DEVICE_HANDLES
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default y
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endif
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config SOC
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default "esp32s3"
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config SOC_TOOLCHAIN_NAME
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string
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default "espressif_esp32s3"
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config HEAP_MEM_POOL_SIZE
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default 32768
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config MINIMAL_LIBC_OPTIMIZE_STRING_FOR_SIZE
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default n
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency)
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config XTENSA_CCOUNT_HZ
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default SYS_CLOCK_HW_CYCLES_PER_SEC
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endif

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