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drivers: pinctrl: bouffalolab: Add bflb pinctrl driver
Add Bouffalo Lab pinctrl driver. Signed-off-by: Gerson Fernando Budke <[email protected]>
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‎drivers/pinctrl/CMakeLists.txt‎

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@@ -5,6 +5,7 @@ zephyr_library()
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zephyr_library_sources(common.c)
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zephyr_library_sources_ifdef(CONFIG_PINCTRL_TELINK_B91 pinctrl_b91.c)
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zephyr_library_sources_ifdef(CONFIG_PINCTRL_AMBIQ pinctrl_ambiq.c)
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zephyr_library_sources_ifdef(CONFIG_PINCTRL_BFLB pinctrl_bflb.c)
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zephyr_library_sources_ifdef(CONFIG_PINCTRL_GD32_AF pinctrl_gd32_af.c)
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zephyr_library_sources_ifdef(CONFIG_PINCTRL_GD32_AFIO pinctrl_gd32_afio.c)
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zephyr_library_sources_ifdef(CONFIG_PINCTRL_ITE_IT8XXX2 pinctrl_ite_it8xxx2.c)

‎drivers/pinctrl/Kconfig‎

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peripheral at early boot stages depending on a certain input.
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source "drivers/pinctrl/Kconfig.b91"
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source "drivers/pinctrl/Kconfig.bflb"
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source "drivers/pinctrl/Kconfig.ambiq"
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source "drivers/pinctrl/Kconfig.gd32"
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source "drivers/pinctrl/Kconfig.it8xxx2"

‎drivers/pinctrl/Kconfig.bflb‎

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# Copyright (c) 2021-2025 Gerson Fernando Budke <[email protected]>
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#
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# SPDX-License-Identifier: Apache-2.0
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config PINCTRL_BFLB
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bool "Bouffalo Lab pin control driver"
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depends on DT_HAS_BFLB_PINCTRL_ENABLED
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default y
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help
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Bouffalo Lab pin control driver

‎drivers/pinctrl/pinctrl_bflb.c‎

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/*
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* Copyright (c) 2021-2025 Gerson Fernando Budke <[email protected]>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <bflb_pinctrl.h>
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#include <bflb_glb.h>
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#include <bflb_gpio.h>
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/* clang-format off */
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int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
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uintptr_t reg)
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{
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GLB_GPIO_Cfg_Type pincfg;
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uint8_t i;
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ARG_UNUSED(reg);
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for (i = 0U; i < pin_cnt; i++) {
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pincfg.gpioFun = BFLB_PINMUX_GET_FUN(pins[i]);
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pincfg.gpioMode = BFLB_PINMUX_GET_MODE(pins[i]);
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pincfg.gpioPin = BFLB_PINMUX_GET_PIN(pins[i]);
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pincfg.pullType = BFLB_PINMUX_GET_PULL_MODES(pins[i]);
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pincfg.smtCtrl = BFLB_PINMUX_GET_SMT(pins[i]);
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pincfg.drive = BFLB_PINMUX_GET_DRIVER_STRENGTH(pins[i]);
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if (pincfg.gpioFun == BFLB_PINMUX_FUN_INST_uart0) {
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GLB_UART_Fun_Sel(pincfg.gpioPin % 8,
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(BFLB_PINMUX_GET_INST(pins[i]))
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* 0x4U /* rts, cts, rx, tx */
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+ BFLB_PINMUX_GET_SIGNAL(pins[i])
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);
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}
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GLB_GPIO_Init(&pincfg);
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}
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return 0;
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}
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/* clang-format on */

‎dts/bindings/gpio/bflb,gpio.yaml‎

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# Copyright (c) 2021-2025 Gerson Fernando Budke <[email protected]>
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#
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# SPDX-License-Identifier: Apache-2.0
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description: Bouffalo Lab GPIO node
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compatible: "bflb,gpio"
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include:
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- name: base.yaml
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- name: gpio-controller.yaml
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properties:
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reg:
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required: true
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interrupts:
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required: true
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"#gpio-cells":
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const: 2
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"#bflb,pin-cells":
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type: int
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required: true
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const: 2
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description: Number of items to expect in a bflb,pins specifier
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gpio-cells:
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- pin
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- flags
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bflb,pin-cells:
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- pin
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- peripheral

‎dts/bindings/pinctrl/bflb,pinctrl.yaml‎

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# Copyright (c) 2021-2025 Gerson Fernando Budke <[email protected]>
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#
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# SPDX-License-Identifier: Apache-2.0
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description: Bouffalo Lab Pinctrl node
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compatible: "bflb,pinctrl"
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include: base.yaml
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properties:
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"#address-cells":
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required: true
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const: 1
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"#size-cells":
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required: true
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const: 1
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child-binding:
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description: |
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Bouffalo Lab pin controller pin configuration nodes. Each node is composed
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by one or more groups, each defining the configuration for a set of pins.
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child-binding:
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description: |
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Bouffalo Lab pin controller pin configuration group. Each group contains
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a list of pins sharing the same set of properties. Example:
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uart0_default: uart0_default {
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/* group 1 (name is arbitrary) */
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group1 {
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/* configure to uart0 function plus modem interrupt, pin 7 as UART_RX
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pin 16 as UART_TX and finally pin 18 as gpio */
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pinmux = <GPIO7_UART0_RX>,
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<GPIO16_UART0_TX>;
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bias-pull-up;
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input-schmitt-enable;
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};
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};
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uart0_sleep: uart0_sleep {
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group1 {
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pinmux = <GPIO7_UART0_RX>,
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<GPIO16_UART0_TX>;
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bias-high-impedance;
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};
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};
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The list of supported standard properties:
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- bias-high-impedance: Disable pull-up/down (default behavior, not
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required).
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- bias-pull-up: Enable pull-up resistor.
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- bias-pull-down: Enable pull-down resistor.
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- input-enable: Enable GPIO as input (default behavior, not required).
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- input-schmitt-enable: Enable Schimitt Trigger when GPIO is Input.
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- output-enable: Enable GPIO as output.
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Note that bias options are mutually exclusive. It is the same with GPIO
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input/output enable options.
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include:
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- name: pincfg-node.yaml
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property-allowlist:
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- bias-high-impedance
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- bias-pull-down
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- bias-pull-up
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- input-enable
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- input-schmitt-enable
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- output-enable
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properties:
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pinmux:
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required: true
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type: array
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description: |
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An array of pins sharing the same group properties. The pins should be
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defined using the BFLB_PINMUX utility macro that encode all the pin
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route matrix.
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drive-strength:
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type: int
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default: 0
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enum:
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- 0 # Default value, lower strength, 8mA
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- 1 # 9.6mA
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- 2 # 11.2mA
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- 3 # highest strength, 12.8mA
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description: |
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Pin drive strength. It tunes pin max current where 0 means lower
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value, which is the default, and 3 represents max drive strength.
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The driver will automatically apply the default value (8mA) to all
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pins to save power.

‎dts/riscv/bouffalolab/bl60x.dtsi‎

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#include <freq.h>
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#include <mem.h>
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#include <dt-bindings/pinctrl/bl60x-pinctrl.h>
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#include <dt-bindings/pinctrl/bflb-common-pinctrl.h>
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/ {
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#address-cells = <1>;
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interrupts-extended = <&ictrl 7>;
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};
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pinctrl: pin-controller@40000000 {
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compatible = "bflb,pinctrl";
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reg = <0x40000000 0x1000>;
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ranges = <0x40000000 0x40000000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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status = "okay";
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glb: gpio@40000000 {
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compatible = "bflb,gpio";
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reg = <0x40000000 0x1000>;
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#gpio-cells = <2>;
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#bflb,pin-cells = <2>;
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status = "disabled";
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gpio-controller;
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interrupts = <1 0>;
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interrupt-parent = <&ictrl>;
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};
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};
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spi0: spi@4000a200 {
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compatible = "bflb,spi";
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reg = <0x4000a200 0x100>;

‎include/zephyr/drivers/pinctrl/pinctrl_soc_bflb_common.h‎

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/*
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* Copyright (c) 2021-2025 Gerson Fernando Budke <[email protected]>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* Bouffalo Lab SoC specific helpers for pinctrl driver
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*/
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#ifndef ZEPHYR_INCLUDE_DRIVERS_PINCTRL_PINCTRL_SOC_BFLB_COMMON_H_
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#define ZEPHYR_INCLUDE_DRIVERS_PINCTRL_PINCTRL_SOC_BFLB_COMMON_H_
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#include <zephyr/devicetree.h>
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#include <zephyr/types.h>
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/* clang-format off */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @cond INTERNAL_HIDDEN */
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/**
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* @brief BFLB pincfg bit field.
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* @anchor BFLB_PINMUX
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*
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* Fields:
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*
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* - 24..31: pin
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* - 20..23: signal
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* - 18..19: mode
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* - 16..17: instance
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* - 8..15: function
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* - 7: reserved
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* - 6: GPIO Output Enable
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* - 5: Pull Down
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* - 4: Pull Up
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* - 2..3: Driver Strength
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* - 1: Schmitt trigger (SMT)
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* - 0: reserved
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*/
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typedef uint32_t pinctrl_soc_pin_t;
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/**
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* @brief Utility macro to initialize each pin.
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*
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* @param node_id Node identifier.
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* @param prop Property name.
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* @param idx Property entry index.
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*/
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#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx) \
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((DT_PROP_BY_IDX(node_id, prop, idx)) \
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| (DT_PROP(node_id, bias_pull_up) << BFLB_PINMUX_PULL_UP_POS) \
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| (DT_PROP(node_id, bias_pull_down) << BFLB_PINMUX_PULL_DOWN_POS) \
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| (DT_PROP(node_id, output_enable) << BFLB_PINMUX_OE_POS) \
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| (DT_PROP(node_id, input_schmitt_enable) << BFLB_PINMUX_SMT_POS) \
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| (DT_ENUM_IDX(node_id, drive_strength) << BFLB_PINMUX_DRIVER_STRENGTH_POS) \
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),
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/**
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* @brief Utility macro to initialize state pins contained in a given property.
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*
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* @param node_id Node identifier.
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* @param prop Property name describing state pins.
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*/
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#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \
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{DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), \
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DT_FOREACH_PROP_ELEM, pinmux, \
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Z_PINCTRL_STATE_PIN_INIT)}
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/** @endcond */
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#ifdef __cplusplus
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}
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#endif
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/* clang-format on */
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#endif /* ZEPHYR_INCLUDE_DRIVERS_PINCTRL_PINCTRL_SOC_BFLB_COMMON_H_ */

‎modules/hal_bouffalolab/include/bflb_gpio.h‎

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/*
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* Copyright (c) 2021-2025 Gerson Fernando Budke <[email protected]>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_HAL_BFLB_GPIO_H_
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#define ZEPHYR_HAL_BFLB_GPIO_H_
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#ifdef CONFIG_SOC_SERIES_BL60X
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#include <bl602_gpio.h>
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#endif
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#endif /* ZEPHYR_HAL_BFLB_GPIO_H_ */

‎modules/hal_bouffalolab/include/bflb_pinctrl.h‎

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/*
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* Copyright (c) 2021-2025 Gerson Fernando Budke <[email protected]>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_HAL_BFLB_PINCTRL_H_
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#define ZEPHYR_HAL_BFLB_PINCTRL_H_
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#ifdef CONFIG_SOC_SERIES_BL60X
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#include <zephyr/dt-bindings/pinctrl/bl60x-pinctrl.h>
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#endif
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#include <zephyr/dt-bindings/pinctrl/bflb-common-pinctrl.h>
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#endif /* ZEPHYR_HAL_BFLB_PINCTRL_H_ */

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