Skip to content

Commit c00c901

Browse files
theotherjimmytheotherjimmy
committed
boards: Add mps3-an547-ns target; build mps3-an547 with TFM in secure mode
This includes a new device tree, new target yaml and new target defconfig Signed-off-by: Jimmy Brisson <[email protected]>
1 parent aa464a9 commit c00c901

File tree

5 files changed

+190
-0
lines changed

5 files changed

+190
-0
lines changed

‎boards/arm/mps3_an547/mps3_an547_ns.dts‎

Lines changed: 142 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,142 @@
1+
/*
2+
* Copyright (c) 2018-2021 Linaro Limited
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
/dts-v1/;
8+
9+
#include <arm/armv8.1-m.dtsi>
10+
#include <dt-bindings/i2c/i2c.h>
11+
#include <mem.h>
12+
13+
/ {
14+
compatible = "arm,mps3-an547";
15+
#address-cells = <1>;
16+
#size-cells = <1>;
17+
18+
aliases {
19+
led0 = &led_0;
20+
led1 = &led_1;
21+
sw0 = &user_button_0;
22+
sw1 = &user_button_1;
23+
};
24+
25+
chosen {
26+
zephyr,console = &uart0;
27+
zephyr,shell-uart = &uart0;
28+
zephyr,sram = &ram;
29+
zephyr,flash = &code;
30+
};
31+
32+
leds {
33+
compatible = "gpio-leds";
34+
led_0: led_0 {
35+
gpios = <&gpio_led0 0>;
36+
label = "USERLED0";
37+
};
38+
led_1: led_1 {
39+
gpios = <&gpio_led0 1>;
40+
label = "USERLED1";
41+
};
42+
};
43+
44+
gpio_keys {
45+
compatible = "gpio-keys";
46+
user_button_0: button_0 {
47+
label = "USERPB0";
48+
gpios = <&gpio_button 0>;
49+
};
50+
user_button_1: button_1 {
51+
label = "USERPB1";
52+
gpios = <&gpio_button 1>;
53+
};
54+
};
55+
56+
cpus {
57+
#address-cells = <1>;
58+
#size-cells = <0>;
59+
60+
cpu@0 {
61+
device_type = "cpu";
62+
compatible = "arm,cortex-m55";
63+
reg = <0>;
64+
#address-cells = <1>;
65+
#size-cells = <1>;
66+
67+
mpu: mpu@e000ed90 {
68+
compatible = "arm,armv8.1m-mpu";
69+
reg = <0xe000ed90 0x40>;
70+
arm,num-mpu-regions = <16>;
71+
};
72+
};
73+
};
74+
75+
/* We utilize the secure addresses, if you subtract 0x10000000
76+
* you'll get the non-secure alias
77+
*/
78+
itcm: itcm@10000000 { /* alias @ 0x0 */
79+
reg = <0x10000000 DT_SIZE_K(512)>;
80+
};
81+
82+
sram: sram@1000000 { /* alias @ 0x11000000 */
83+
compatible = "mmio-sram";
84+
reg = <0x1000000 DT_SIZE_M(2)>;
85+
};
86+
87+
dtcm: dtcm@20000000 { /* alias @ 0x30000000 */
88+
reg = <0x20000000 DT_SIZE_K(512)>;
89+
};
90+
91+
isram: sram@31000000 {/* alias @ 0x21000000 */
92+
compatible = "mmio-sram";
93+
reg = <0x31000000 DT_SIZE_M(4)>;
94+
};
95+
96+
/* DDR4 - 2G, alternates non-secure/secure every 256M */
97+
ddr4: memory@60000000 {
98+
device_type = "memory";
99+
reg = <0x60000000 DT_SIZE_M(256)
100+
0x70000000 DT_SIZE_M(256)
101+
0x80000000 DT_SIZE_M(256)
102+
0x90000000 DT_SIZE_M(256)
103+
0xa0000000 DT_SIZE_M(256)
104+
0xb0000000 DT_SIZE_M(256)
105+
0xc0000000 DT_SIZE_M(256)
106+
0xd0000000 DT_SIZE_M(256)>;
107+
};
108+
109+
reserved-memory {
110+
#address-cells = <1>;
111+
#size-cells = <1>;
112+
ranges;
113+
114+
/* The memory regions defined below must match what the TF-M
115+
* project has defined for that board - a single image boot is
116+
* assumed. Please see the memory layout in:
117+
* https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/platform/ext/target/mps3/an547/partition/flash_layout.h
118+
*/
119+
120+
code: memory@01060000 {
121+
reg = <0x01060000 DT_SIZE_K(384)>;
122+
};
123+
124+
ram: memory@21000000 {
125+
reg = <0x21000000 DT_SIZE_M(2)>;
126+
};
127+
};
128+
129+
soc {
130+
peripheral@40000000 {
131+
#address-cells = <1>;
132+
#size-cells = <1>;
133+
ranges = <0x0 0x40000000 0x10000000>;
134+
135+
#include "mps3_an547-common.dtsi"
136+
};
137+
};
138+
};
139+
140+
&nvic {
141+
arm,num-irq-priority-bits = <3>;
142+
};

‎boards/arm/mps3_an547/mps3_an547_ns.yaml‎

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,19 @@
1+
#
2+
# Copyright (c) 2019-2021 Linaro Limited
3+
#
4+
# SPDX-License-Identifier: Apache-2.0
5+
#
6+
7+
identifier: mps3_an547_ns
8+
name: Arm MPS3-AN547_ns
9+
type: mcu
10+
arch: arm
11+
simulation: qemu
12+
toolchain:
13+
- gnuarmemb
14+
- zephyr
15+
- xtools
16+
testing:
17+
default: true
18+
only_tags:
19+
- tfm

‎boards/arm/mps3_an547/mps3_an547_ns_defconfig‎

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,26 @@
1+
#
2+
# Copyright (c) 2018-2021 Linaro Limited
3+
#
4+
# SPDX-License-Identifier: Apache-2.0
5+
#
6+
7+
CONFIG_SOC_SERIES_MPS3=y
8+
CONFIG_SOC_MPS3_AN547=y
9+
CONFIG_BOARD_MPS3_AN547=y
10+
CONFIG_ARM_TRUSTZONE_M=y
11+
CONFIG_CORTEX_M_SYSTICK=y
12+
CONFIG_RUNTIME_NMI=y
13+
CONFIG_TRUSTED_EXECUTION_NONSECURE=y
14+
CONFIG_ARM_MPU=y
15+
CONFIG_QEMU_ICOUNT_SHIFT=7
16+
17+
# GPIOs
18+
CONFIG_GPIO=y
19+
20+
# Serial
21+
CONFIG_CONSOLE=y
22+
CONFIG_UART_CONSOLE=y
23+
CONFIG_SERIAL=y
24+
CONFIG_UART_CMSDK_APB=y
25+
26+
CONFIG_I2C=y

‎doc/guides/tfm/requirements.rst‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,8 @@ The following are some of the boards that can be used with TF-M:
1010
- NSPE board name
1111
* - :ref:`mps2_an521_board`
1212
- ``mps2_an521_ns`` (qemu supported)
13+
* - :ref:`mps2_an547_board`
14+
- ``mps2_an547_ns`` (qemu supported)
1315
* - :ref:`bl5340_dvk`
1416
- ``bl5340_dvk_cpuapp_ns``
1517
* - :ref:`lpcxpresso55s69`

‎modules/trusted-firmware-m/Kconfig.tfm‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@ config TFM_BOARD
1313
default "nordic_nrf/nrf5340dk_nrf5340_cpuapp" if BOARD_NRF5340DK_NRF5340_CPUAPP_NS
1414
default "nxp/lpcxpresso55s69" if BOARD_LPCXPRESSO55S69_CPU0
1515
default "arm/mps2/an521" if BOARD_MPS2_AN521_CPU0_NS
16+
default "arm/mps3/an547" if BOARD_MPS3_AN547
1617
default "stm/nucleo_l552ze_q" if BOARD_NUCLEO_L552ZE_Q
1718
default "stm/stm32l562e_dk" if BOARD_STM32L562E_DK
1819
default "arm/musca_b1/sse_200" if BOARD_MUSCA_B1

0 commit comments

Comments
 (0)