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8 | 8 | #include <st/l5/stm32l562qeixq-pinctrl.dtsi> |
9 | 9 | #include "arduino_r3_connector.dtsi" |
10 | 10 | #include <zephyr/dt-bindings/input/input-event-codes.h> |
| 11 | +#include <zephyr/dt-bindings/memory-controller/stm32-fmc-nor-psram.h> |
| 12 | +#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h> |
11 | 13 |
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12 | 14 | / { |
13 | 15 | leds { |
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42 | 44 | }; |
43 | 45 | }; |
44 | 46 |
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| 47 | +&fmc { |
| 48 | + pinctrl-0 = <&fmc_a0_pf0 &fmc_nce_pd7 &fmc_nwe_pd5 &fmc_noe_pd4 |
| 49 | + &fmc_d0_pd14 &fmc_d1_pd15 &fmc_d2_pd0 &fmc_d3_pd1 |
| 50 | + &fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9 &fmc_d7_pe10 |
| 51 | + &fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13 &fmc_d11_pe14 |
| 52 | + &fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9 &fmc_d15_pd10>; |
| 53 | + pinctrl-names = "default"; |
| 54 | + status = "okay"; |
| 55 | + |
| 56 | + sram { |
| 57 | + compatible = "st,stm32-fmc-nor-psram"; |
| 58 | + |
| 59 | + #address-cells = <1>; |
| 60 | + #size-cells = <0>; |
| 61 | + |
| 62 | + bank@0 { |
| 63 | + reg = <0x0>; |
| 64 | + st,control = <STM32_FMC_DATA_ADDRESS_MUX_DISABLE |
| 65 | + STM32_FMC_MEMORY_TYPE_SRAM |
| 66 | + STM32_FMC_NORSRAM_MEM_BUS_WIDTH_16 |
| 67 | + STM32_FMC_BURST_ACCESS_MODE_DISABLE |
| 68 | + STM32_FMC_WAIT_SIGNAL_POLARITY_LOW |
| 69 | + STM32_FMC_WAIT_TIMING_BEFORE_WS |
| 70 | + STM32_FMC_WRITE_OPERATION_ENABLE |
| 71 | + STM32_FMC_WAIT_SIGNAL_DISABLE |
| 72 | + STM32_FMC_EXTENDED_MODE_DISABLE |
| 73 | + STM32_FMC_ASYNCHRONOUS_WAIT_DISABLE |
| 74 | + STM32_FMC_WRITE_BURST_DISABLE |
| 75 | + STM32_FMC_CONTINUOUS_CLOCK_SYNC_ONLY |
| 76 | + STM32_FMC_WRITE_FIFO_DISABLE |
| 77 | + STM32_FMC_PAGE_SIZE_NONE>; |
| 78 | + st,timing = <1 1 32 0 2 2 STM32_FMC_ACCESS_MODE_A>; |
| 79 | + |
| 80 | + fmc-mipi-dbi { |
| 81 | + compatible = "st,stm32-fmc-mipi-dbi"; |
| 82 | + reset-gpios = <&gpiof 14 GPIO_ACTIVE_LOW>; |
| 83 | + power-gpios = <&gpioh 0 GPIO_ACTIVE_LOW>; |
| 84 | + register-select-pin = <0>; |
| 85 | + #address-cells = <1>; |
| 86 | + #size-cells = <0>; |
| 87 | + st7789v: lcd-panel@0 { |
| 88 | + compatible = "sitronix,st7789v"; |
| 89 | + reg = <0>; |
| 90 | + mipi-mode = <MIPI_DBI_MODE_8080_BUS_16_BIT>; |
| 91 | + /* A write cycle should be 68ns */ |
| 92 | + mipi-max-frequency = <14705882>; |
| 93 | + width = <240>; |
| 94 | + height = <240>; |
| 95 | + x-offset = <0>; |
| 96 | + y-offset = <0>; |
| 97 | + vcom = <0x1F>; |
| 98 | + gctrl = <0x35>; |
| 99 | + vdvs = <0x20>; |
| 100 | + mdac = <0x00>; |
| 101 | + gamma = <0x01>; |
| 102 | + colmod = <0x05>; |
| 103 | + lcm = <0x2c>; |
| 104 | + porch-param = [0c 0c 00 33 33]; |
| 105 | + cmd2en-param = [5a 69 02 00]; |
| 106 | + pwctrl1-param = [a4 a1]; |
| 107 | + pvgam-param = [D0 08 11 08 0C 15 39 33 50 36 13 14 29 2D]; |
| 108 | + nvgam-param = [D0 08 10 08 06 06 39 44 51 0B 16 14 2F 31]; |
| 109 | + ram-param = [00 F0]; |
| 110 | + rgb-param = [40 02 14]; |
| 111 | + }; |
| 112 | + }; |
| 113 | + }; |
| 114 | + }; |
| 115 | +}; |
| 116 | + |
45 | 117 | &clk_hsi48 { |
46 | 118 | status = "okay"; |
47 | 119 | }; |
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