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boards: fk723m1_zgt6: initial support
Add the FK723M1-ZGT6 V1.0 board based on the stm32h723zgt6. Signed-off-by: Paul Wedeck <[email protected]>
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# Copyright (c) 2025 Paul Wedeck <[email protected]>
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_FK723M1_ZGT6
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select SOC_STM32H723XX
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if BOARD_FK723M1_ZGT6
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config SDMMC_STM32_CLOCK_CHECK
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default n
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endif # BOARD_FK723M1_ZGT6

boards/fanke/fk723m1_zgt6/board.cmake

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# SPDX-License-Identifier: Apache-2.0
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# keep first
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board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=sw")
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board_runner_args(jlink "--device=STM32H723ZG" "--speed=4000")
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# keep first
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include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/fanke/fk723m1_zgt6/board.yml

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board:
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name: fk723m1_zgt6
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full_name: FK723M1-ZGT6
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vendor: other
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socs:
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- name: stm32h723xx
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.. zephyr:board:: fk723m1_zgt6
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Overview
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********
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The FK723M1-ZGT6 board is a development board for the STM32H723ZGT6 SoC.
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Key Features
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- STM32 microcontroller in LQFP144 package
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- USB OTG or full-speed device
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- 1 user LEDs
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- 1 boot and reset push-buttons
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- 15 MHz and 32.768 kHz crystal oscillators
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- Board connectors:
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- USB with USB-C
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- FPC10P LCD connector
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- FPC20P Camera connector
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- 8 pin debug connector
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More information about the board can be found at the `FK723M1-ZGT6 Schematic`_.
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Hardware
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********
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FK723M1-ZGT6 provides the following hardware components:
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- STM32H723ZG in LQFP144 package
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- ARM 32-bit Cortex-M7 CPU with FPU
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- Chrom-ART Accelerator
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- Hardware JPEG Codec
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- 550 MHz max CPU frequency
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- VDD from 1.62 V to 3.6 V
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- 1 MB Flash
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- 562 kB SRAM max (376 kb used currently)
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- High-resolution timer (2.1 ns)
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- 32-bit timers(2)
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- 16-bit timers(12)
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- SPI(6)
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- I2C(4)
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- I2S (3)
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- USART(4)
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- UART(4)
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- USB OTG Full Speed(1)
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- CAN FD(2)
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- SAI(2)
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- SPDIF_Rx(4)
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- HDMI_CEC(1)
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- Dual Mode Quad SPI(1)
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- Camera Interface
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- GPIO (up to 114) with external interrupt capability
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- 16-bit ADC(3) with 36 channels / 3.6 MSPS
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- 12-bit DAC with 2 channels(2)
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- True Random Number Generator (RNG)
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- 16-channel DMA
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- LCD-TFT Controller with XGA resolution
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Supported Features
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==================
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The Zephyr fk723m1_zgt6 board configuration supports the following hardware
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features:
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+-------------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+=============+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-------------+------------+-------------------------------------+
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| UART | on-chip | serial port |
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+-------------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-------------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-------------+------------+-------------------------------------+
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| RTC | on-chip | counter |
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+-------------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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+-------------+------------+-------------------------------------+
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| SPI | on-chip | spi |
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+-------------+------------+-------------------------------------+
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| PWM | on-chip | pwm |
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+-------------+------------+-------------------------------------+
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| ETHERNET | on-chip | ethernet |
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+-------------+------------+-------------------------------------+
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| RNG | on-chip | True Random number generator |
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+-------------+------------+-------------------------------------+
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| Backup SRAM | on-chip | Backup SRAM |
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+-------------+------------+-------------------------------------+
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| RTC | on-chip | rtc |
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+-------------+------------+-------------------------------------+
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| FDCAN | on-chip | CAN-FD Controller |
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+-------------+------------+-------------------------------------+
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Other hardware features are not yet supported on this Zephyr port.
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The default configuration can be found in the defconfig files:
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:zephyr_file:`boards/fanke/fk723m1_zgt6/fk723m1_zgt6_defconfig`
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Default Zephyr Peripheral Mapping:
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----------------------------------
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The FK723M1-ZGT6 board features one USB port, two 30x2 pin headers, one 4x2 debug header,
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one micro SD slot, one FPC10P LCD interface, one FPC20P Camera interface and one built-in external Quad SPI flash.
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The board is configured as follows:
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- UART_1 TX/RX : PA9/PA10 (debug header UART)
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- LD1 : PG7
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System Clock
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------------
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FK723M1-ZGT6 System Clock could be driven by an internal or external
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oscillator, as well as the main PLL clock. By default, the System clock is
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driven by the PLL clock at 550MHz, driven by an 15MHz high-speed external clock.
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Serial Port
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-----------
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FK723M1-ZGT6 board has 4 UARTs and 4 USARTs. The Zephyr console output is
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assigned to UART1. Default settings are 115200 8N1.
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Programming and Debugging
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*************************
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FK723M1-ZGT6 provides a special SWD header.
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Flashing
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========
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The board is configured to be flashed using west `STM32CubeProgrammer`_ runner,
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so its :ref:`installation <stm32cubeprog-flash-host-tools>` is required.
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Alternatively, OpenOCD or JLink can also be used to flash the board using
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the ``--runner`` (or ``-r``) option:
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.. code-block:: console
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$ west flash --runner openocd
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$ west flash --runner jlink
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Flashing an application to FK723M1-ZGT6
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----------------------------------------
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First, connect a SWD capable debugger to the debug header on FK723M1-ZGT6.
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Then connect the debugger to the host computer to prepare the board for flashing.
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Finally, build and flash your application.
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Here is an example for the :zephyr:code-sample:`blinky` application.
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Optional: Connect a USB-to-serial adapter to RX and TX (cross connect!).
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.. code-block:: console
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$ minicom -b 115200 -D /dev/ttyACM0
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or use screen:
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.. code-block:: console
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$ screen /dev/ttyACM0 115200
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Build and flash the application:
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.. zephyr-app-commands::
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:zephyr-app: samples/basic/blinky
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:board: fk723m1_zgt6
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:goals: build flash
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You should see the following messages on the console repeatedly:
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.. code-block:: console
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$ LED state: ON
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$ LED state: OFF
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Hello World example can also be used:
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: fk723m1_zgt6
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:goals: build flash
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Debugging
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=========
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You can debug an application in the usual way. Here is an example for the
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:zephyr:code-sample:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: fk723m1_zgt6
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:maybe-skip-config:
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:goals: debug
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.. _FK723M1-ZGT6 Schematic:
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https://community.st.com/ysqtg83639/attachments/ysqtg83639/mcu-boards-hardware-tools-forum/20009/1/FK723M1-ZGT6.zh-CN.en.pdf
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.. _STM32H723ZG on www.st.com:
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https://www.st.com/en/microcontrollers-microprocessors/stm32h723zg.html
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.. _STM32H723 reference manual:
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https://www.st.com/resource/en/reference_manual/dm00603761-stm32h723733-stm32h725735-and-stm32h730-value-line-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
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.. _STM32CubeIDE:
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https://www.st.com/en/development-tools/stm32cubeide.html
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.. _STM32CubeProgrammer:
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https://www.st.com/en/development-tools/stm32cubeprog.html
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/*
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* Copyright (c) 2020 Alexander Kozhinov <[email protected]>
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* Copyright (c) 2024 zack jiang <[email protected]>
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* Copyright (c) 2025 Paul Wedeck <[email protected]>
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <st/h7/stm32h723Xg.dtsi>
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#include <st/h7/stm32h723zgtx-pinctrl.dtsi>
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/ {
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model = "FK723M1-ZGT6 board";
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compatible = "fanke,fk723m1-zgt6";
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chosen {
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zephyr,console = &usart1;
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zephyr,shell-uart = &usart1;
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zephyr,dtcm = &dtcm;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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zephyr,canbus = &fdcan1;
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};
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leds: leds {
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compatible = "gpio-leds";
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blue_led: led_0 {
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gpios = <&gpiog 7 GPIO_ACTIVE_LOW>;
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label = "User LED";
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};
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};
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aliases {
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led0 = &blue_led;
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sdhc0 = &sdmmc1;
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};
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};
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&clk_lsi {
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status = "okay";
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};
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&clk_hsi {
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status = "okay";
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};
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&clk_hsi48 {
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status = "okay";
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};
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&clk_hse {
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clock-frequency = <DT_FREQ_M(25)>;
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status = "okay";
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};
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&clk_lse {
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status = "okay";
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};
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&pll {
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div-m = <2>;
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mul-n = <44>;
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div-p = <1>;
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div-q = <22>;
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div-r = <2>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&pll2 {
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div-m = <2>;
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mul-n = <32>;
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div-p = <5>;
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div-q = <5>;
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div-r = <5>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(550)>;
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d1cpre = <1>;
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hpre = <2>; /* HCLK: 275 MHz */
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d1ppre = <2>; /* APB1: 137.5 MHz */
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d2ppre1 = <2>; /* APB2: 137.5 MHz */
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d2ppre2 = <2>; /* APB3: 137.5 MHz */
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d3ppre = <2>; /* APB4: 137.5 MHz */
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};
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&usart1 {
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pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
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pinctrl-names = "default";
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current-speed = <115200>;
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status = "okay";
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};
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&rtc {
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clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>,
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<&rcc STM32_SRC_LSI RTC_SEL(2)>;
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status = "okay";
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};
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&backup_sram {
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status = "okay";
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};
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zephyr_udc0: &usbotg_hs {
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pinctrl-0 = <&usb_otg_hs_dm_pa11 &usb_otg_hs_dp_pa12>;
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pinctrl-names = "default";
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status = "okay";
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};
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&rng {
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status = "okay";
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};
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&sdmmc1 {
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pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9 &sdmmc1_d2_pc10
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&sdmmc1_d3_pc11 &sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>;
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pinctrl-names = "default";
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clocks = <&rcc STM32_CLOCK(AHB3, 16U)>,
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<&rcc STM32_SRC_PLL1_Q SDMMC_SEL(0)>;
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status = "okay";
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bus-width = <4>;
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};
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&octospi1 {
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pinctrl-0 = <&octospim_p1_ncs_pg6 &octospim_p1_clk_pf10
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&octospim_p1_io0_pf8 &octospim_p1_io1_pf9
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&octospim_p1_io2_pf7 &octospim_p1_io3_pf6>;
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pinctrl-names = "default";
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status = "okay";
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/* Winbond external flash */
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qspi: qspi-nor-flash@0 {
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compatible = "st,stm32-ospi-nor";
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reg = <0 DT_SIZE_M(8)>; /* 64 Mbits */
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ospi-max-frequency = <DT_FREQ_M(133)>;
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spi-bus-width = <OSPI_QUAD_MODE>;
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data-rate = <OSPI_STR_TRANSFER>;
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writeoc = "PP_1_1_4";
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status = "okay";
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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storage_partition: partition@0 {
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reg = <0x00000000 DT_SIZE_M(8)>; /* 64 Mbits */
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};
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};
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};
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};

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