riscv: pmp: Ensure trailing PMP entries are cleared

In `z_riscv_pmp_stackguard_enable`, the call to `write_pmp_entries`
has been updated to set the `clear_trailing_entries` argument to `true`.

This change ensures that any PMP entries beyond the ones being actively
configured are disabled. This is critical for systems, such as firmwares
transitioning between different execution stages (e.g., from a Read-Only
(RO) phase to a Read-Write (RW) phase), which may have distinct PMP
setups.

Without clearing trailing entries, stale configurations from a previous
stage could persist. These leftover entries could lead to incorrect memory
access permissions, resulting in functional bugs or potential security
vulnerabilities. This commit guarantees a clean PMP state after an update.

Author: fsammoura1980

arch/riscv/core/pmp.c

@@ -522,7 +522,7 @@ void z_riscv_pmp_stackguard_enable(struct k_thread *thread)
 
 	/* Write our m-mode MPP entries */
 	write_pmp_entries(global_pmp_end_index, thread->arch.m_mode_pmp_end_index,
-			  false /* no need to clear to the end */,
+			  true,
 			  PMP_M_MODE(thread));
 
 	if (PMP_DEBUG_DUMP) {