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mathieuchopstmfabiobaltieri
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drivers: usb: udc: stm32: instance-aware clock configuration handling
Instead of using globals, save the clock configuration from DTS in each instance's configuration block, from which it is consumed by the driver's clock configuration functions. Signed-off-by: Mathieu Choplain <[email protected]>
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+29
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drivers/usb/udc/udc_stm32.c

Lines changed: 29 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -171,12 +171,23 @@ struct udc_stm32_config {
171171
uint32_t dram_size;
172172
/* Global USB interrupt IRQn */
173173
uint32_t irqn;
174+
/*
175+
* Clock configuration from DTS
176+
*
177+
* Note that this actually points to a const
178+
* struct stm32_pclken but dropping the const
179+
* qualifier here allows calling Clock Control
180+
* without cast to clock_control_subsys_t.
181+
*/
182+
struct stm32_pclken *pclken;
174183
/* PHY selected for use by instance */
175184
uint32_t selected_phy;
176185
/* Speed selected for use by instance */
177186
uint32_t selected_speed;
178187
/* Maximal packet size allowed for endpoints */
179188
uint16_t ep_mps;
189+
/* Number of entries in `pclken` */
190+
uint8_t num_clocks;
180191
};
181192

182193
enum udc_stm32_msg_type {
@@ -191,8 +202,8 @@ struct udc_stm32_msg {
191202
uint16_t rx_count;
192203
};
193204

194-
static int udc_stm32_clock_enable(void);
195-
static int udc_stm32_clock_disable(void);
205+
static int udc_stm32_clock_enable(const struct device *);
206+
static int udc_stm32_clock_disable(const struct device *);
196207

197208
static void udc_stm32_lock(const struct device *dev)
198209
{
@@ -697,7 +708,7 @@ int udc_stm32_init(const struct device *dev)
697708
const struct udc_stm32_config *cfg = dev->config;
698709
HAL_StatusTypeDef status;
699710

700-
if (udc_stm32_clock_enable() < 0) {
711+
if (udc_stm32_clock_enable(dev) < 0) {
701712
LOG_ERR("Error enabling clock(s)");
702713
return -EIO;
703714
}
@@ -929,7 +940,7 @@ static int udc_stm32_shutdown(const struct device *dev)
929940
/* continue anyway */
930941
}
931942

932-
if (udc_stm32_clock_disable() < 0) {
943+
if (udc_stm32_clock_disable(dev) < 0) {
933944
LOG_ERR("Error disabling clock(s)");
934945
/* continue anyway */
935946
}
@@ -1228,21 +1239,24 @@ static struct udc_data udc0_data = {
12281239
.priv = &udc0_priv,
12291240
};
12301241

1242+
static const struct stm32_pclken udc0_pclken[] = STM32_DT_INST_CLOCKS(0);
1243+
12311244
static const struct udc_stm32_config udc0_cfg = {
12321245
.base = (void *)DT_INST_REG_ADDR(0),
12331246
.num_endpoints = USB_NUM_BIDIR_ENDPOINTS,
12341247
.dram_size = DT_INST_PROP(0, ram_size),
12351248
.irqn = UDC_STM32_IRQ,
1249+
.pclken = (struct stm32_pclken *)udc0_pclken,
1250+
.num_clocks = DT_INST_NUM_CLOCKS(0),
12361251
.ep_mps = UDC_STM32_NODE_EP_MPS(DT_DRV_INST(0)),
12371252
.selected_phy = UDC_STM32_NODE_PHY_ITFACE(DT_DRV_INST(0)),
12381253
.selected_speed = UDC_STM32_NODE_SPEED(DT_DRV_INST(0)),
12391254
};
12401255

1241-
static struct stm32_pclken pclken[] = STM32_DT_INST_CLOCKS(0);
1242-
1243-
static int udc_stm32_clock_enable(void)
1256+
static int udc_stm32_clock_enable(const struct device *dev)
12441257
{
12451258
const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE);
1259+
const struct udc_stm32_config *cfg = dev->config;
12461260

12471261
if (!device_is_ready(clk)) {
12481262
LOG_ERR("clock control device not ready");
@@ -1319,22 +1333,22 @@ static int udc_stm32_clock_enable(void)
13191333
LL_PWR_EnableVDDUSB();
13201334
#endif
13211335

1322-
if (DT_INST_NUM_CLOCKS(0) > 1) {
1323-
if (clock_control_configure(clk, &pclken[1], NULL) != 0) {
1336+
if (cfg->num_clocks > 1) {
1337+
if (clock_control_configure(clk, &cfg->pclken[1], NULL) != 0) {
13241338
LOG_ERR("Could not select USB domain clock");
13251339
return -EIO;
13261340
}
13271341
}
13281342

1329-
if (clock_control_on(clk, &pclken[0]) != 0) {
1343+
if (clock_control_on(clk, &cfg->pclken[0]) != 0) {
13301344
LOG_ERR("Unable to enable USB clock");
13311345
return -EIO;
13321346
}
13331347

1334-
if (IS_ENABLED(CONFIG_UDC_STM32_CLOCK_CHECK)) {
1348+
if (IS_ENABLED(CONFIG_UDC_STM32_CLOCK_CHECK) && cfg->num_clocks > 1) {
13351349
uint32_t usb_clock_rate;
13361350

1337-
if (clock_control_get_rate(clk, &pclken[1], &usb_clock_rate) != 0) {
1351+
if (clock_control_get_rate(clk, &cfg->pclken[1], &usb_clock_rate) != 0) {
13381352
LOG_ERR("Failed to get USB domain clock rate");
13391353
return -EIO;
13401354
}
@@ -1450,11 +1464,12 @@ static int udc_stm32_clock_enable(void)
14501464
return 0;
14511465
}
14521466

1453-
static int udc_stm32_clock_disable(void)
1467+
static int udc_stm32_clock_disable(const struct device *dev)
14541468
{
14551469
const struct device *clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE);
1470+
const struct udc_stm32_config *cfg = dev->config;
14561471

1457-
if (clock_control_off(clk, &pclken[0]) != 0) {
1472+
if (clock_control_off(clk, &cfg->pclken[0]) != 0) {
14581473
LOG_ERR("Unable to disable USB clock");
14591474
return -EIO;
14601475
}

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