@@ -45,24 +45,24 @@ extern "C" {
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*/
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/** Enables pin as input. */
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- #define GPIO_INPUT (1U << 16)
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+ #define GPIO_INPUT BIT( 16)
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/** Enables pin as output, no change to the output state. */
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- #define GPIO_OUTPUT (1U << 17)
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+ #define GPIO_OUTPUT BIT( 17)
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/** Disables pin for both input and output. */
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#define GPIO_DISCONNECTED 0
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/** @cond INTERNAL_HIDDEN */
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/* Initializes output to a low state. */
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- #define GPIO_OUTPUT_INIT_LOW (1U << 18)
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+ #define GPIO_OUTPUT_INIT_LOW BIT( 18)
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/* Initializes output to a high state. */
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- #define GPIO_OUTPUT_INIT_HIGH (1U << 19)
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+ #define GPIO_OUTPUT_INIT_HIGH BIT( 19)
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/* Initializes output based on logic level */
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- #define GPIO_OUTPUT_INIT_LOGICAL (1U << 20)
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+ #define GPIO_OUTPUT_INIT_LOGICAL BIT( 20)
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/** @endcond */
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@@ -98,19 +98,19 @@ extern "C" {
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*/
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/** Disables GPIO pin interrupt. */
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- #define GPIO_INT_DISABLE (1U << 21)
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+ #define GPIO_INT_DISABLE BIT( 21)
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/** @cond INTERNAL_HIDDEN */
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/* Enables GPIO pin interrupt. */
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- #define GPIO_INT_ENABLE (1U << 22)
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+ #define GPIO_INT_ENABLE BIT( 22)
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/* GPIO interrupt is sensitive to logical levels.
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*
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* This is a component flag that should be combined with other
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* `GPIO_INT_*` flags to produce a meaningful configuration.
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*/
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- #define GPIO_INT_LEVELS_LOGICAL (1U << 23)
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+ #define GPIO_INT_LEVELS_LOGICAL BIT( 23)
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/* GPIO interrupt is edge sensitive.
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*
@@ -119,23 +119,23 @@ extern "C" {
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* This is a component flag that should be combined with other
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* `GPIO_INT_*` flags to produce a meaningful configuration.
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*/
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- #define GPIO_INT_EDGE (1U << 24)
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+ #define GPIO_INT_EDGE BIT( 24)
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/* Trigger detection when input state is (or transitions to) physical low or
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* logical 0 level.
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*
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* This is a component flag that should be combined with other
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* `GPIO_INT_*` flags to produce a meaningful configuration.
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*/
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- #define GPIO_INT_LOW_0 (1U << 25)
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+ #define GPIO_INT_LOW_0 BIT( 25)
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/* Trigger detection on input state is (or transitions to) physical high or
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* logical 1 level.
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*
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* This is a component flag that should be combined with other
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* `GPIO_INT_*` flags to produce a meaningful configuration.
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*/
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- #define GPIO_INT_HIGH_1 (1U << 26)
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+ #define GPIO_INT_HIGH_1 BIT( 26)
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#ifdef CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT
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/* Disable/Enable interrupt functionality without changing other interrupt
@@ -144,7 +144,7 @@ extern "C" {
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* This is a component flag that should be combined with `GPIO_INT_ENABLE` or
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* `GPIO_INT_DISABLE` flags to produce a meaningful configuration.
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*/
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- #define GPIO_INT_ENABLE_DISABLE_ONLY (1u << 27)
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+ #define GPIO_INT_ENABLE_DISABLE_ONLY BIT( 27)
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#endif /* CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT */
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#define GPIO_INT_MASK (GPIO_INT_DISABLE | \
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