boards: arm: fvp_base_revc_2xaemv8a: allow SMP on bare metal

This adds necessary configuration files to build with SMP and no trusted
firmware. Given PSCI is not available, CPU power management uses the FVP
power controller directly.

Signed-off-by: Nicolas Pitre <[email protected]>

Author: Nicolas Pitre

boards/arm/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a_fvp_base_revc_2xaemv8a_smp.dts

@@ -0,0 +1,6 @@
+/*
+ * Copyright (c) 2025 BayLibre SAS
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "fvp_base_revc_2xaemv8a.dts"

boards/arm/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a_fvp_base_revc_2xaemv8a_smp.yaml

@@ -0,0 +1,16 @@
+# Copyright (c) 2025 BayLibre SAS
+# SPDX-License-Identifier: Apache-2.0
+
+identifier: fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp
+name: FVP Emulation FVP_Base_RevC-2xAEMvA (SMP)
+arch: arm64
+type: sim
+simulation:
+  - name: armfvp
+    exec: FVP_Base_RevC-2xAEMvA
+toolchain:
+  - zephyr
+  - cross-compile
+ram: 2048
+flash: 64
+vendor: arm

boards/arm/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a_fvp_base_revc_2xaemv8a_smp_defconfig

@@ -0,0 +1,30 @@
+# Copyright (c) 2025 BayLibre SAS
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_THREAD_STACK_INFO=y
+
+# Enable Timer and Sys clock
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
+CONFIG_ARM_ARCH_TIMER=y
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable serial port
+CONFIG_UART_INTERRUPT_DRIVEN=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Enable SMP
+CONFIG_SMP=y
+CONFIG_MP_MAX_NUM_CPUS=4
+CONFIG_CACHE_MANAGEMENT=y
+CONFIG_TIMEOUT_64BIT=y
+CONFIG_ARM64_SET_VMPIDR_EL2=y
+
+# CPU control without PSCI
+CONFIG_PM_CPU_OPS_PSCI=n
+CONFIG_PM_CPU_OPS=y
+CONFIG_PM_CPU_OPS_FVP=y