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RichardSWheatleycarlescufi
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boards: arm: apollo4p_evb Shield Support
Correct pinctrl for rev2 board. Rename IOM properly in ambiq_apollo4p.dtsi Signed-off-by: Richard Wheatley <[email protected]>
1 parent d2e090d commit c6f21b2

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4 files changed

+97
-11
lines changed

4 files changed

+97
-11
lines changed

boards/arm/apollo4p_evb/apollo4p_evb-pinctrl.dtsi

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -98,6 +98,7 @@
9898
};
9999
group2 {
100100
pinmux = <NCE11_P11>;
101+
drive-strength = "0.5";
101102
drive-push-pull;
102103
ambiq,iom-nce-module = <4>;
103104
};

boards/arm/apollo4p_evb/apollo4p_evb.dts

Lines changed: 14 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -69,15 +69,15 @@
6969
status = "okay";
7070
};
7171

72-
&iom0 {
72+
&iom0_i2c {
7373
compatible = "ambiq,i2c";
7474
pinctrl-0 = <&i2c0_default>;
7575
pinctrl-names = "default";
7676
clock-frequency = <I2C_BITRATE_STANDARD>;
7777
status = "okay";
7878
};
7979

80-
&iom1 {
80+
&iom1_spi {
8181
compatible = "ambiq,spi";
8282
pinctrl-0 = <&spi1_default>;
8383
pinctrl-names = "default";
@@ -91,6 +91,18 @@
9191
status = "okay";
9292
};
9393

94+
&mspi1 {
95+
pinctrl-0 = <&mspi1_default>;
96+
pinctrl-names = "default";
97+
status = "okay";
98+
};
99+
100+
&mspi2 {
101+
pinctrl-0 = <&mspi2_default>;
102+
pinctrl-names = "default";
103+
status = "okay";
104+
};
105+
94106
&gpio0_31 {
95107
status = "okay";
96108
};

boards/arm/apollo4p_evb/apollo4p_evb_connector.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -118,4 +118,4 @@
118118
};
119119
};
120120

121-
ambiq_spi: &iom1 {};
121+
spi1: &iom1_spi {};

dts/arm/ambiq/ambiq_apollo4p.dtsi

Lines changed: 81 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -106,7 +106,7 @@
106106
ambiq,pwrcfg = <&pwrcfg 0x4 0x1000>;
107107
};
108108

109-
iom0: iom@40050000 {
109+
iom0_spi: spi@40050000 {
110110
reg = <0x40050000 0x1000>;
111111
#address-cells = <1>;
112112
#size-cells = <0>;
@@ -115,7 +115,16 @@
115115
ambiq,pwrcfg = <&pwrcfg 0x4 0x2>;
116116
};
117117

118-
iom1: iom@40051000 {
118+
iom0_i2c: i2c@40050000 {
119+
reg = <0x40050000 0x1000>;
120+
#address-cells = <1>;
121+
#size-cells = <0>;
122+
interrupts = <6 0>;
123+
status = "disabled";
124+
ambiq,pwrcfg = <&pwrcfg 0x4 0x2>;
125+
};
126+
127+
iom1_spi: spi@40051000 {
119128
reg = <0x40051000 0x1000>;
120129
#address-cells = <1>;
121130
#size-cells = <0>;
@@ -124,7 +133,16 @@
124133
ambiq,pwrcfg = <&pwrcfg 0x4 0x4>;
125134
};
126135

127-
iom2: iom@40052000 {
136+
iom1_i2c: i2c@40051000 {
137+
reg = <0x40051000 0x1000>;
138+
#address-cells = <1>;
139+
#size-cells = <0>;
140+
interrupts = <7 0>;
141+
status = "disabled";
142+
ambiq,pwrcfg = <&pwrcfg 0x4 0x4>;
143+
};
144+
145+
iom2_spi: spi@40052000 {
128146
reg = <0x40052000 0x1000>;
129147
#address-cells = <1>;
130148
#size-cells = <0>;
@@ -133,15 +151,34 @@
133151
ambiq,pwrcfg = <&pwrcfg 0x4 0x8>;
134152
};
135153

136-
iom3: iom@40053000 {
154+
iom2_i2c: i2c@40052000 {
155+
reg = <0x40052000 0x1000>;
156+
#address-cells = <1>;
157+
#size-cells = <0>;
158+
interrupts = <8 0>;
159+
status = "disabled";
160+
ambiq,pwrcfg = <&pwrcfg 0x4 0x8>;
161+
};
162+
163+
iom3_spi: spi@40053000 {
164+
reg = <0x40053000 0x1000>;
165+
#address-cells = <1>;
166+
#size-cells = <0>;
167+
interrupts = <9 0>;
168+
status = "disabled";
169+
ambiq,pwrcfg = <&pwrcfg 0x4 0x10>;
170+
};
171+
172+
iom3_i2c: i2c@40053000 {
137173
reg = <0x40053000 0x1000>;
138174
#address-cells = <1>;
139175
#size-cells = <0>;
140176
interrupts = <9 0>;
141177
status = "disabled";
142178
ambiq,pwrcfg = <&pwrcfg 0x4 0x10>;
143179
};
144-
iom4: iom@40054000 {
180+
181+
iom4_spi: spi@40054000 {
145182
reg = <0x40054000 0x1000>;
146183
#address-cells = <1>;
147184
#size-cells = <0>;
@@ -150,7 +187,25 @@
150187
ambiq,pwrcfg = <&pwrcfg 0x4 0x20>;
151188
};
152189

153-
iom5: iom@40055000 {
190+
iom4_i2c: i2c@40054000 {
191+
reg = <0x40054000 0x1000>;
192+
#address-cells = <1>;
193+
#size-cells = <0>;
194+
interrupts = <10 0>;
195+
status = "disabled";
196+
ambiq,pwrcfg = <&pwrcfg 0x4 0x20>;
197+
};
198+
199+
iom5_spi: spi@40055000 {
200+
reg = <0x40055000 0x1000>;
201+
#address-cells = <1>;
202+
#size-cells = <0>;
203+
interrupts = <11 0>;
204+
status = "disabled";
205+
ambiq,pwrcfg = <&pwrcfg 0x4 0x40>;
206+
};
207+
208+
iom5_i2c: i2c@40055000 {
154209
reg = <0x40055000 0x1000>;
155210
#address-cells = <1>;
156211
#size-cells = <0>;
@@ -159,7 +214,7 @@
159214
ambiq,pwrcfg = <&pwrcfg 0x4 0x40>;
160215
};
161216

162-
iom6: iom@40056000 {
217+
iom6_spi: spi@40056000 {
163218
reg = <0x40056000 0x1000>;
164219
#address-cells = <1>;
165220
#size-cells = <0>;
@@ -168,7 +223,25 @@
168223
ambiq,pwrcfg = <&pwrcfg 0x4 0x80>;
169224
};
170225

171-
iom7: iom@40057000 {
226+
iom6_i2c: i2c@40056000 {
227+
reg = <0x40056000 0x1000>;
228+
#address-cells = <1>;
229+
#size-cells = <0>;
230+
interrupts = <12 0>;
231+
status = "disabled";
232+
ambiq,pwrcfg = <&pwrcfg 0x4 0x80>;
233+
};
234+
235+
iom7_spi: spi@40057000 {
236+
reg = <0x40057000 0x1000>;
237+
#address-cells = <1>;
238+
#size-cells = <0>;
239+
interrupts = <13 0>;
240+
status = "disabled";
241+
ambiq,pwrcfg = <&pwrcfg 0x4 0x100>;
242+
};
243+
244+
iom7_i2c: i2c@40057000 {
172245
reg = <0x40057000 0x1000>;
173246
#address-cells = <1>;
174247
#size-cells = <0>;

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