|
1 | | -.. _intel_rpl_s_crb: |
| 1 | +.. _intel_rpl_crb: |
2 | 2 |
|
3 | | -Raptor Lake S CRB |
4 | | -################# |
| 3 | +Raptor Lake CRB |
| 4 | +############### |
5 | 5 |
|
6 | 6 | Overview |
7 | 7 | ******** |
8 | | -Raptor Lake Reference Board (RPL CRB) is an example implementation of a |
9 | | -compact single board computer with high performance for IoT edge devices. |
| 8 | +Raptor Lake processor is a 13th generation 64-bit multi-core processor built |
| 9 | +on a 10-nanometer technology process. Raptor Lake is based on a Hybrid |
| 10 | +architecture, utilizing P-cores for performance and E-Cores for efficiency. |
10 | 11 |
|
11 | | -This board configuration enables kernel support for the `RPL`_ board. |
| 12 | +Raptor Lake S and Raptor Lake P processor lines are supported. |
12 | 13 |
|
13 | | -.. note:: |
14 | | - This board configuration works on the variant of `RPL`_ |
15 | | - boards containing Intel |reg| Core |trade| SoC. |
| 14 | +The S-Processor line is a 2-Chip Platform that includes the Processor Die and |
| 15 | +Platform Controller Hub (PCH-S) Die in the Package. |
| 16 | + |
| 17 | +The P-Processor line is a 2-Die Multi Chip Package (MCP) that includes the |
| 18 | +Processor Die and Platform Controller Hub (PCH-P) Die on the same package as |
| 19 | +the Processor Die. |
| 20 | + |
| 21 | +For more information about Raptor Lake Processor lines, P-cores, and E-cores |
| 22 | +please refer to `RPL`_. |
| 23 | + |
| 24 | +Raptor Lake Customer Reference Board (RPL CRB) is an example implementation of a |
| 25 | +compact single board computer with high performance for IoT edge devices. The |
| 26 | +supported boards are `intel_rpl_s_crb` and `intel_rpl_p_crb`. |
| 27 | + |
| 28 | +These board configurations enable kernel support for the supported Raptor Lake |
| 29 | +boards. |
16 | 30 |
|
17 | 31 | Hardware |
18 | 32 | ******** |
19 | 33 |
|
20 | | -General information about the board can be found at the `RPL`_ website. |
| 34 | +General information about the board can be found at the `RPL`_. |
21 | 35 |
|
22 | 36 | .. include:: ../../../../soc/x86/raptor_lake/doc/supported_features.txt |
23 | 37 |
|
24 | 38 |
|
25 | 39 | Connections and IOs |
26 | 40 | =================== |
27 | 41 |
|
28 | | -Refer to the `RPL`_ website for more information. |
| 42 | +Refer to the `RPL`_ for more information. |
29 | 43 |
|
30 | 44 | Programming and Debugging |
31 | 45 | ************************* |
32 | | -Use the following procedures for booting an image on a RPL CRB board. |
| 46 | +Use the following procedures for booting an image on an RPL CRB board. |
33 | 47 |
|
34 | 48 | .. contents:: |
35 | 49 | :depth: 1 |
@@ -58,4 +72,4 @@ Booting the Raptor Lake S CRB Board using UEFI |
58 | 72 | .. include:: ../../common/efi_boot.rst |
59 | 73 | :start-after: start_include_here |
60 | 74 |
|
61 | | -.. _RPL: https://www.intel.com/content/www/us/en/newsroom/resources/13th-gen-core.html#gs.glf2fn |
| 75 | +.. _RPL: https://edc.intel.com/content/www/us/en/design/products/platforms/details/raptor-lake-s/13th-generation-core-processors-datasheet-volume-1-of-2/ |
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