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soc: silabs: Add support for additional BG22 SoCs
Adds all known EFR32BG22 SoCs and associated DTS includes. Signed-off-by: James Smith <[email protected]>
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‎dts/arm/silabs/xg22/efr32bg22c222f352gm32.dtsi

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/*
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* Copyright (c) 2021 Sateesh Kotapati
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <silabs/xg22/efr32bg22.dtsi>
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#include <mem.h>
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/ {
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soc {
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compatible = "silabs,efr32bg22c222f352gm32", "silabs,efr32bg22", "silabs,xg22",
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"silabs,efr32", "simple-bus";
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model = "Silicon Labs EFR32BG22C222F352GM32 SoC";
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};
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};
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&flash0 {
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reg = <0x0 DT_SIZE_K(352)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(32)>;
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};

‎dts/arm/silabs/xg22/efr32bg22c222f352gm40.dtsi

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/*
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* Copyright (c) 2021 Sateesh Kotapati
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <silabs/xg22/efr32bg22.dtsi>
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#include <mem.h>
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/ {
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soc {
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compatible = "silabs,efr32bg22c222f352gm40", "silabs,efr32bg22", "silabs,xg22",
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"silabs,efr32", "simple-bus";
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model = "Silicon Labs EFR32BG22C222F352GM40 SoC";
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};
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};
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&flash0 {
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reg = <0x0 DT_SIZE_K(352)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(32)>;
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};

‎dts/arm/silabs/xg22/efr32bg22c222f352gn32.dtsi

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/*
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* Copyright (c) 2021 Sateesh Kotapati
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <silabs/xg22/efr32bg22.dtsi>
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#include <mem.h>
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/ {
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soc {
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compatible = "silabs,efr32bg22c222f352gn32", "silabs,efr32bg22", "silabs,xg22",
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"silabs,efr32", "simple-bus";
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model = "Silicon Labs EFR32BG22C222F352GN32 SoC";
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};
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};
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&flash0 {
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reg = <0x0 DT_SIZE_K(352)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(32)>;
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};

‎dts/arm/silabs/xg22/efr32bg22c224f512gm32.dtsi

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/*
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* Copyright (c) 2021 Sateesh Kotapati
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <silabs/xg22/efr32bg22.dtsi>
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#include <mem.h>
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/ {
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soc {
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compatible = "silabs,efr32bg22c224f512gm32", "silabs,efr32bg22", "silabs,xg22",
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"silabs,efr32", "simple-bus";
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model = "Silicon Labs EFR32BG22C224F512GM32 SoC";
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};
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};
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&flash0 {
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reg = <0x0 DT_SIZE_K(512)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(32)>;
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};

‎dts/arm/silabs/xg22/efr32bg22c224f512gm40.dtsi

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/*
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* Copyright (c) 2021 Sateesh Kotapati
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <silabs/xg22/efr32bg22.dtsi>
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#include <mem.h>
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/ {
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soc {
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compatible = "silabs,efr32bg22c224f512gm40", "silabs,efr32bg22", "silabs,xg22",
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"silabs,efr32", "simple-bus";
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model = "Silicon Labs EFR32BG22C224F512GM40 SoC";
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};
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};
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&flash0 {
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reg = <0x0 DT_SIZE_K(512)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(32)>;
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};

‎dts/arm/silabs/xg22/efr32bg22c224f512gn32.dtsi

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/*
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* Copyright (c) 2021 Sateesh Kotapati
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <silabs/xg22/efr32bg22.dtsi>
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#include <mem.h>
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/ {
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soc {
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compatible = "silabs,efr32bg22c224f512gn32", "silabs,efr32bg22", "silabs,xg22",
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"silabs,efr32", "simple-bus";
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model = "Silicon Labs EFR32BG22C224F512GN32 SoC";
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};
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};
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&flash0 {
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reg = <0x0 DT_SIZE_K(512)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(32)>;
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};

‎dts/arm/silabs/xg22/efr32bg22c224f512im32.dtsi

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/*
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* Copyright (c) 2021 Sateesh Kotapati
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <silabs/xg22/efr32bg22.dtsi>
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#include <mem.h>
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/ {
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soc {
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compatible = "silabs,efr32bg22c224f512im32", "silabs,efr32bg22", "silabs,xg22",
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"silabs,efr32", "simple-bus";
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model = "Silicon Labs EFR32BG22C224F512IM32 SoC";
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};
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};
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&flash0 {
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reg = <0x0 DT_SIZE_K(512)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(32)>;
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};

‎soc/silabs/silabs_s2/xg22/Kconfig.soc

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bool
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select SOC_SERIES_EFR32BG22
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config SOC_EFR32BG22C224F512IM32
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bool
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select SOC_SERIES_EFR32BG22
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config SOC_EFR32BG22C224F512GN32
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bool
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select SOC_SERIES_EFR32BG22
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config SOC_EFR32BG22C224F512GM40
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bool
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select SOC_SERIES_EFR32BG22
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config SOC_EFR32BG22C224F512GM32
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bool
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select SOC_SERIES_EFR32BG22
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config SOC_EFR32BG22C222F352GN32
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bool
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select SOC_SERIES_EFR32BG22
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config SOC_EFR32BG22C222F352GM40
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bool
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select SOC_SERIES_EFR32BG22
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config SOC_EFR32BG22C222F352GM32
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bool
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select SOC_SERIES_EFR32BG22
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config SOC_EFR32MG22C224F512IM40
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bool
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select SOC_SERIES_EFR32MG22
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config SOC
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default "efr32bg22c224f512im40" if SOC_PART_NUMBER_EFR32BG22C224F512IM40
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default "efr32bg22c224f512im32" if SOC_EFR32BG22C224F512IM32
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default "efr32bg22c224f512gn32" if SOC_EFR32BG22C224F512GN32
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default "efr32bg22c224f512gm40" if SOC_EFR32BG22C224F512GM40
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default "efr32bg22c224f512gm32" if SOC_EFR32BG22C224F512GM32
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default "efr32bg22c222f352gn32" if SOC_EFR32BG22C222F352GN32
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default "efr32bg22c222f352gm40" if SOC_EFR32BG22C222F352GM40
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default "efr32bg22c222f352gm32" if SOC_EFR32BG22C222F352GM32
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default "efr32mg22c224f512im40" if SOC_EFR32MG22C224F512IM40
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default "efr32mg22c224f512im32" if SOC_EFR32MG22C224F512IM32
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default "efr32mg22c224f512gn32" if SOC_EFR32MG22C224F512GN32

‎soc/silabs/soc.yml

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- name: efr32bg22
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socs:
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- name: efr32bg22c224f512im40
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- name: efr32bg22c224f512im32
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- name: efr32bg22c224f512gn32
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- name: efr32bg22c224f512gm40
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- name: efr32bg22c224f512gm32
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- name: efr32bg22c222f352gn32
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- name: efr32bg22c222f352gm40
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- name: efr32bg22c222f352gm32
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- name: efr32mg22
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socs:
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- name: efr32mg22c224f512im40

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