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| 1 | +# Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd. |
| 2 | +# SPDX-License-Identifier: Apache-2.0 |
| 3 | + |
| 4 | +description: | |
| 5 | +
|
| 6 | + Espressif's Pulse Counter Mode (PCNT) controller Node |
| 7 | +
|
| 8 | + The pulse counter module is designed to count the number of |
| 9 | + rising and/or falling edges of an input signal. |
| 10 | +
|
| 11 | + The ESP32's PCNT module has 8 independent counting “units” numbered from 0 to 7. |
| 12 | + The ESP32S2's PCNT module has 4 independent counting “units” numbered from 0 to 3. |
| 13 | +
|
| 14 | + Each pulse counter unit has a 16-bit signed counter register. |
| 15 | +
|
| 16 | + Each unit has two independent channel: ch0 and ch1 that can be configured |
| 17 | + to either increment or decrement the counter. |
| 18 | +
|
| 19 | + Each channel has two inputs: a signal input that accepts signal edges |
| 20 | + to be detected, as well as a control input that can be used to enable |
| 21 | + or disable the signal input. |
| 22 | +
|
| 23 | + Each pulse counter unit also features a filter on each of the four inputs, |
| 24 | + adding the option to ignore short glitches in the signals. |
| 25 | +
|
| 26 | + By combining the usage of both signal and control inputs, a PCNT unit can |
| 27 | + act as a quadrature decoder. |
| 28 | +
|
| 29 | + Example: Use PCNT to read a rotary-enconder |
| 30 | +
|
| 31 | + The mapping between signal and control input and the pin is done through pinctrl: |
| 32 | +
|
| 33 | + &pinctrl { |
| 34 | + pcnt_default: pcnt_default { |
| 35 | + group1 { |
| 36 | + pinmux = <PCNT0_CH0SIG_GPIO14>, |
| 37 | + <PCNT0_CH0CTRL_GPIO15>; |
| 38 | + bias-pull-up; |
| 39 | + }; |
| 40 | + }; |
| 41 | + }; |
| 42 | +
|
| 43 | + Note: Check espressif,esp32-pinctrl.yaml for complete documentation regarding pinctrl. |
| 44 | +
|
| 45 | + Use the PCNT node to configure the module: |
| 46 | +
|
| 47 | + &pcnt { |
| 48 | + pinctrl-0 = <&pcnt_default>; |
| 49 | + pinctrl-names = "default"; |
| 50 | + status = "okay"; |
| 51 | + #address-cells = <1>; |
| 52 | + #size-cells = <0>; |
| 53 | + unit0@0 { |
| 54 | + reg = <0>; |
| 55 | + #address-cells = <1>; |
| 56 | + #size-cells = <0>; |
| 57 | + filter = <100>; |
| 58 | + channelA@0 { |
| 59 | + reg = <0>; |
| 60 | + sig-pos-mode = <2>; |
| 61 | + sig-neg-mode = <1>; |
| 62 | + ctrl-h-mode = <0>; |
| 63 | + ctrl-l-mode = <1>; |
| 64 | + }; |
| 65 | + }; |
| 66 | + }; |
| 67 | +
|
| 68 | +compatible: "espressif,esp32-pcnt" |
| 69 | + |
| 70 | +include: [base.yaml, pinctrl-device.yaml] |
| 71 | + |
| 72 | +child-binding: |
| 73 | + description: PCNT Unit configuration. |
| 74 | + |
| 75 | + properties: |
| 76 | + reg: |
| 77 | + type: int |
| 78 | + required: true |
| 79 | + enum: |
| 80 | + - 0 |
| 81 | + - 1 |
| 82 | + - 2 |
| 83 | + - 3 |
| 84 | + - 4 |
| 85 | + - 5 |
| 86 | + - 6 |
| 87 | + - 7 |
| 88 | + |
| 89 | + description: | |
| 90 | + The PCNT unit index. |
| 91 | + The ESP32 has 8 PCNT units. ESP32S2 has 4 PCNT units. |
| 92 | +
|
| 93 | + filter: |
| 94 | + type: int |
| 95 | + required: false |
| 96 | + description: Pulse length (ns) to be ignored |
| 97 | + |
| 98 | + child-binding: |
| 99 | + description: PCNT Channel configuration. |
| 100 | + |
| 101 | + properties: |
| 102 | + reg: |
| 103 | + type: int |
| 104 | + required: true |
| 105 | + enum: |
| 106 | + - 0 |
| 107 | + - 1 |
| 108 | + |
| 109 | + description: The PCNT channel index. |
| 110 | + |
| 111 | + sig-pos-mode: |
| 112 | + type: int |
| 113 | + required: false |
| 114 | + enum: |
| 115 | + - 0 |
| 116 | + - 1 |
| 117 | + - 2 |
| 118 | + |
| 119 | + description: | |
| 120 | + Define what to do on the positive edge of pulse input. |
| 121 | + 0 (Default) - Inhibit counter (counter value will not change in this condition). |
| 122 | + 1 - Increase counter value. |
| 123 | + 2 - Decrease counter value. |
| 124 | +
|
| 125 | + sig-neg-mode: |
| 126 | + type: int |
| 127 | + required: false |
| 128 | + enum: |
| 129 | + - 0 |
| 130 | + - 1 |
| 131 | + - 2 |
| 132 | + |
| 133 | + description: | |
| 134 | + Define what to do on the negative edge of pulse input. |
| 135 | + 0 (Default) - Inhibit counter (counter value will not change in this condition). |
| 136 | + 1 - Increase counter value. |
| 137 | + 2 - Decrease counter value. |
| 138 | +
|
| 139 | + ctrl-h-mode: |
| 140 | + type: int |
| 141 | + required: false |
| 142 | + enum: |
| 143 | + - 0 |
| 144 | + - 1 |
| 145 | + - 2 |
| 146 | + |
| 147 | + description: | |
| 148 | + Define what to do when the control input is high. |
| 149 | + 0 (Default) - Don't change counter mode. |
| 150 | + 1 - Invert counter mode(increase -> decrease, decrease -> increase). |
| 151 | + 2 - Control mode: Inhibit counter (counter value will not change in this condition). |
| 152 | +
|
| 153 | + ctrl-l-mode: |
| 154 | + type: int |
| 155 | + required: false |
| 156 | + enum: |
| 157 | + - 0 |
| 158 | + - 1 |
| 159 | + - 2 |
| 160 | + |
| 161 | + description: | |
| 162 | + Define what to do when the control input is low. |
| 163 | + 0 (Default) - Don't change counter mode. |
| 164 | + 1 - Invert counter mode(increase -> decrease, decrease -> increase). |
| 165 | + 2 - Control mode: Inhibit counter (counter value will not change in this condition). |
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