Skip to content

Commit cb953a4

Browse files
vaishnavachathcfriedt
vaishnavachath
authored and
cfriedt
committed
soc: arm: ti_simplelink: Add support for TI CC13X2X7 SoC series
Product URL: https://www.ti.com/product/CC1352P7 Datasheet : https://www.ti.com/lit/ds/symlink/cc1352p7.pdf Features: Powerful 48-MHz Arm® Cortex®-M4F processor * 704KB flash program memory * 256KB of ROM for protocols and library functions * 8KB of cache SRAM * 144KB of ultra-low leakage SRAM with parity for high-reliability operation * Dual-band Sub-1 GHz and 2.4 GHz operation Updates: * Remove CC1352P7_LaunchXL due to compliance checks * Add CC1352P7 updates * Update hal_ti for CC1352P7 support * Remove blank line at end of modules/Kconfig.simplelink * Split struct and typedef for pinctrl_soc_pin/pinctrl_soc_pin_t * Reference cc13x2_cc26x2/pinctrl_soc.h * Reference cc13x2_cc26x2/soc.h Signed-off-by: Vaishnav Achath <[email protected]>
1 parent 18af9f0 commit cb953a4

File tree

17 files changed

+475
-2
lines changed

17 files changed

+475
-2
lines changed

‎dts/arm/ti/cc1352r7.dtsi‎

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,31 @@
1+
/*
2+
* Copyright (c) 2019 Brett Witherspoon
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#include <mem.h>
8+
#include <ti/cc13x2_cc26x2.dtsi>
9+
10+
/ {
11+
sram0: memory@20000000 {
12+
reg = <0x20000000 DT_SIZE_K(144)>;
13+
};
14+
};
15+
16+
&flash0 {
17+
reg = <0x0 DT_SIZE_K(704)>;
18+
19+
partitions {
20+
compatible = "fixed-partitions";
21+
#address-cells = <1>;
22+
#size-cells = <1>;
23+
24+
/* CCFG registers occupy the last 88 bytes of flash */
25+
ti_ccfg_partition: partition@affa8 {
26+
compatible = "zephyr,memory-region";
27+
reg = <0xaffa8 88>;
28+
zephyr,memory-region = "FLASH_CCFG";
29+
};
30+
};
31+
};

‎modules/Kconfig.simplelink‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -29,3 +29,6 @@ config HAS_MSP432P4XXSDK
2929

3030
config HAS_CC13X2_CC26X2_SDK
3131
bool
32+
33+
config HAS_CC13X2X7_CC26X2X7_SDK
34+
bool

‎soc/arm/ti_simplelink/cc13x2x7_cc26x2x7/CMakeLists.txt‎

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,11 @@
1+
# Copyright (c) 2022 Vaishnav Achath
2+
#
3+
# SPDX-License-Identifier: Apache-2.0
4+
5+
zephyr_sources(soc.c)
6+
zephyr_sources(ccfg.c)
7+
8+
zephyr_library_sources_ifdef(CONFIG_PM power.c)
9+
zephyr_library_sources_ifdef(CONFIG_PM_DEVICE power.c)
10+
11+
zephyr_linker_sources_ifdef(CONFIG_HAS_TI_CCFG SECTIONS ccfg.ld)

‎soc/arm/ti_simplelink/cc13x2x7_cc26x2x7/Kconfig.defconfig.cc1352r7‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
# Texas Instruments SimpleLink CC1352R
2+
#
3+
# Copyright (c) 2022 Vaishnav Achath
4+
#
5+
# SPDX-License-Identifier: Apache-2.0
6+
7+
config SOC
8+
default "cc1352r7"
9+
depends on SOC_CC1352R7

‎soc/arm/ti_simplelink/cc13x2x7_cc26x2x7/Kconfig.defconfig.cc2652r7‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
1+
# Texas Instruments SimpleLink CC2652R
2+
3+
# Copyright (c) 2022 Vaishnav Achath
4+
# SPDX-License-Identifier: Apache-2.0
5+
6+
config SOC
7+
default "cc2652r7"
8+
depends on SOC_CC2652R7

‎soc/arm/ti_simplelink/cc13x2x7_cc26x2x7/Kconfig.defconfig.series‎

Lines changed: 47 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,47 @@
1+
# Texas Instruments SimpleLink CC13x2 / CC26x2
2+
3+
# Copyright (c) 2022 Vaishnav Achath
4+
# SPDX-License-Identifier: Apache-2.0
5+
6+
if SOC_SERIES_CC13X2X7_CC26X2X7
7+
8+
source "soc/arm/ti_simplelink/cc13x2x7_cc26x2x7/Kconfig.defconfig.cc*"
9+
10+
config SOC_SERIES
11+
default "cc13x2x7_cc26x2x7"
12+
13+
config SYS_CLOCK_HW_CYCLES_PER_SEC
14+
default 32768
15+
16+
# Note that when using the RTC as system clock, this needs to be 32768
17+
# to reduce truncation errors from accumulating due to conversion to/from
18+
# time, ticks, and HW cycles
19+
config SYS_CLOCK_TICKS_PER_SEC
20+
default 32768
21+
22+
config NUM_IRQS
23+
default 38
24+
25+
if IEEE802154
26+
27+
config IEEE802154_CC13XX_CC26XX
28+
# required for linking with PowerCC26X2_config in
29+
# soc/arm/ti_simplelink/cc13x2_cc26x2/power.c
30+
select PM
31+
32+
config IEEE802154_CC13XX_CC26XX_SUB_GHZ
33+
# required for linking with PowerCC26X2_config in
34+
# soc/arm/ti_simplelink/cc13x2_cc26x2/power.c
35+
select PM
36+
37+
endif # IEEE802154
38+
39+
if BT
40+
41+
config BLE_CC13XX_CC26XX
42+
bool
43+
default y
44+
45+
endif # BT
46+
47+
endif # SOC_SERIES_CC13X2X7_CC26X2X7

‎soc/arm/ti_simplelink/cc13x2x7_cc26x2x7/Kconfig.series‎

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
# Texas Instruments SimpleLink CC13x2 / CC26x2
2+
3+
# Copyright (c) 2022 Vaishnav Achath
4+
# SPDX-License-Identifier: Apache-2.0
5+
6+
config SOC_SERIES_CC13X2X7_CC26X2X7
7+
bool "TI SimpleLink Family CC13x2x7/ CC26x2x7"
8+
select ARM
9+
select CPU_CORTEX_M4
10+
select CPU_HAS_ARM_MPU
11+
select DYNAMIC_INTERRUPTS
12+
select CPU_CORTEX_M_HAS_DWT
13+
select CPU_HAS_FPU
14+
select SOC_FAMILY_TISIMPLELINK
15+
select HAS_CC13X2X7_CC26X2X7_SDK
16+
select HAS_TI_CCFG if !BOOTLOADER_MCUBOOT
17+
help
18+
Enable support for TI SimpleLink CC13x2x7 / CC26x2x7 SoCs

‎soc/arm/ti_simplelink/cc13x2x7_cc26x2x7/Kconfig.soc‎

Lines changed: 68 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,68 @@
1+
# Texas Instruments SimpleLink CC13x2 / CC26x2
2+
3+
# Copyright (c) 2022 Vaishnav Achath
4+
# SPDX-License-Identifier: Apache-2.0
5+
6+
choice
7+
prompt "TI SimpleLink MCU Selection"
8+
depends on SOC_SERIES_CC13X2X7_CC26X2X7
9+
10+
config SOC_CC2652R7
11+
bool "CC2652R7"
12+
13+
config SOC_CC1352R7
14+
bool "CC1352R7"
15+
16+
config SOC_CC2652P7
17+
bool "CC2652P7"
18+
19+
config SOC_CC1352P7
20+
bool "CC1352P7"
21+
22+
endchoice
23+
24+
menu "Customer Configuration (CCFG)"
25+
depends on SOC_SERIES_CC13X2X7_CC26X2X7
26+
27+
config CC13X2_CC26X2_BOOST_MODE
28+
bool "Radio boost mode (VDDR_HH)"
29+
help
30+
Enable the radio boost mode +14dBm (sets CCFG_FORCE_VDDR_HH to 1).
31+
32+
config CC13X2_CC26X2_HAS_CUSTOM_RF_HWATTRS
33+
bool "Board defines custom RFCC26XX hwAttrs structure"
34+
help
35+
The board defines its own RFCC26XX_hwAttrs structure (e.g., for
36+
custom antenna switching callback).
37+
38+
config CC13X2_CC26X2_BOOTLOADER_ENABLE
39+
bool "ROM bootloader"
40+
help
41+
Enable the serial bootloader which resides in ROM on CC13xx / CC26xx
42+
devices.
43+
44+
config CC13X2_CC26X2_BOOTLOADER_BACKDOOR_ENABLE
45+
bool "ROM bootloader backdoor"
46+
depends on CC13X2_CC26X2_BOOTLOADER_ENABLE
47+
help
48+
Enable the ROM bootloader backdoor which starts the bootloader if the
49+
associated pin is at the correct logic level on reset.
50+
51+
config CC13X2_CC26X2_BOOTLOADER_BACKDOOR_PIN
52+
int "ROM bootloader backdoor pin"
53+
depends on CC13X2_CC26X2_BOOTLOADER_BACKDOOR_ENABLE
54+
range 0 255
55+
default 255
56+
help
57+
Set the pin that is level checked if the bootloader backdoor is
58+
enabled.
59+
60+
config CC13X2_CC26X2_BOOTLOADER_BACKDOOR_LEVEL
61+
int "ROM bootloader backdoor level"
62+
depends on CC13X2_CC26X2_BOOTLOADER_BACKDOOR_ENABLE
63+
range 0 1
64+
default 0
65+
help
66+
Set the active level of the pin selected for the bootloader backdoor.
67+
68+
endmenu

‎soc/arm/ti_simplelink/cc13x2x7_cc26x2x7/ccfg.c‎

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,26 @@
1+
/*
2+
* Copyright (c) 2022 Vaishnav Achath
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#ifdef CONFIG_CC13X2_CC26X2_BOOST_MODE
8+
#define CCFG_FORCE_VDDR_HH 1
9+
#endif
10+
11+
#ifdef CONFIG_CC13X2_CC26X2_BOOTLOADER_ENABLE
12+
#define SET_CCFG_BL_CONFIG_BOOTLOADER_ENABLE 0xC5
13+
#else
14+
#define SET_CCFG_BL_CONFIG_BOOTLOADER_ENABLE 0x00
15+
#endif /* CONFIG_CC13X2_CC26X2_BOOTLOADER_ENABLE */
16+
17+
#ifdef CONFIG_CC13X2_CC26X2_BOOTLOADER_BACKDOOR_ENABLE
18+
#define SET_CCFG_BL_CONFIG_BL_ENABLE 0xC5
19+
#define SET_CCFG_BL_CONFIG_BL_PIN_NUMBER CONFIG_CC13X2_CC26X2_BOOTLOADER_BACKDOOR_PIN
20+
#define SET_CCFG_BL_CONFIG_BL_LEVEL CONFIG_CC13X2_CC26X2_BOOTLOADER_BACKDOOR_LEVEL
21+
#else
22+
#define SET_CCFG_BL_CONFIG_BL_ENABLE 0x00
23+
#endif /* CONFIG_CC13X2_CC26X2_BOOTLOADER_BACKDOOR_ENABLE */
24+
25+
/* TI recommends setting CCFG values and then including the TI provided ccfg.c */
26+
#include <startup_files/ccfg.c>

‎soc/arm/ti_simplelink/cc13x2x7_cc26x2x7/ccfg.ld‎

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,15 @@
1+
/*
2+
* Copyright (c) 2021, Commonwealth Scientific and Industrial Research
3+
* Organisation (CSIRO) ABN 41 687 119 230.
4+
*
5+
* SPDX-License-Identifier: Apache-2.0
6+
*/
7+
8+
GROUP_START(FLASH_CCFG)
9+
10+
SECTION_PROLOGUE(.ti_ccfg,,)
11+
{
12+
KEEP(*(_TI_CCFG_SECTION_NAME))
13+
} GROUP_LINK_IN(LINKER_DT_NODE_REGION_NAME(DT_NODELABEL(ti_ccfg_partition)))
14+
15+
GROUP_END(FLASH_CCFG)

0 commit comments

Comments
 (0)