@@ -15,7 +15,7 @@ BUILD_ASSERT(((NRF_PULL_NONE == NRF_GPIO_PIN_NOPULL) &&
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(NRF_PULL_UP == NRF_GPIO_PIN_PULLUP )),
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"nRF pinctrl pull settings do not match HAL values" );
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- #if defined( GPIO_PIN_CNF_DRIVE_E0E1 ) || defined( GPIO_PIN_CNF_DRIVE0_E0 )
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+ #if NRF_GPIO_HAS_DRIVE_EXTRA
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#define NRF_DRIVE_COUNT (NRF_DRIVE_E0E1 + 1)
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#else
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#define NRF_DRIVE_COUNT (NRF_DRIVE_H0D1 + 1)
@@ -29,7 +29,7 @@ static const nrf_gpio_pin_drive_t drive_modes[NRF_DRIVE_COUNT] = {
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[NRF_DRIVE_D0H1 ] = NRF_GPIO_PIN_D0H1 ,
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[NRF_DRIVE_S0D1 ] = NRF_GPIO_PIN_S0D1 ,
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[NRF_DRIVE_H0D1 ] = NRF_GPIO_PIN_H0D1 ,
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- #if defined( GPIO_PIN_CNF_DRIVE_E0E1 ) || defined ( GPIO_PIN_CNF_DRIVE0_E0 )
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+ #if NRF_GPIO_HAS_DRIVE_EXTRA
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[NRF_DRIVE_E0E1 ] = NRF_GPIO_PIN_E0E1 ,
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#endif
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};
@@ -494,7 +494,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
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#endif /* defined(NRF_PSEL_TDM) */
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#if defined(NRF_GRTC_CLKOUT_FAST )
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case NRF_FUN_GRTC_CLKOUT_FAST :
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- #if NRF_GPIO_HAS_SEL && defined( GPIO_PIN_CNF_CTRLSEL_GRTC )
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+ #if NRF_GPIO_HAS_SEL && NRF_GPIO_HAS_CTRLSEL_GRTC
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nrf_gpio_pin_control_select (psel , NRF_GPIO_PIN_SEL_GRTC );
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#endif
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dir = NRF_GPIO_PIN_DIR_OUTPUT ;
@@ -503,7 +503,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
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#endif /* defined(NRF_GRTC_CLKOUT_FAST) */
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#if defined(NRF_GRTC_CLKOUT_SLOW )
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case NRF_FUN_GRTC_CLKOUT_32K :
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- #if NRF_GPIO_HAS_SEL && defined( GPIO_PIN_CNF_CTRLSEL_GRTC )
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+ #if NRF_GPIO_HAS_SEL && NRF_GPIO_HAS_CTRLSEL_GRTC
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nrf_gpio_pin_control_select (psel , NRF_GPIO_PIN_SEL_GRTC );
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#endif
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dir = NRF_GPIO_PIN_DIR_OUTPUT ;
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