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dts: sensor: adding nodes for STM32 quadrature encoder
Nodes for quadrature encoders are added to the STM32F4 devices Signed-off-by: Valerio Setti <[email protected]>
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dts/arm/st/f4/stm32f4.dtsi

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/*
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* Copyright (c) 2017 Linaro Limited
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* Copyright (c) 2019 Centaur Analytics, Inc
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* Copyright (c) 2022 Valerio Setti <[email protected]>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/dt-bindings/gpio/gpio.h>
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#include <zephyr/dt-bindings/pwm/pwm.h>
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#include <zephyr/dt-bindings/pwm/stm32_pwm.h>
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#include <zephyr/dt-bindings/sensor/qdec_stm32.h>
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#include <freq.h>
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/ {
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status = "disabled";
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#pwm-cells = <3>;
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};
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qdec {
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compatible = "st,stm32-qdec";
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status = "disabled";
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st,input-filter-level = <NO_FILTER>;
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};
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};
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timers2: timers@40000000 {
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compatible = "st,stm32-counter";
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status = "disabled";
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};
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qdec {
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compatible = "st,stm32-qdec";
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status = "disabled";
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st,input-filter-level = <NO_FILTER>;
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};
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};
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timers3: timers@40000400 {
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compatible = "st,stm32-counter";
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status = "disabled";
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};
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qdec {
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compatible = "st,stm32-qdec";
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status = "disabled";
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st,input-filter-level = <NO_FILTER>;
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};
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};
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timers4: timers@40000800 {
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compatible = "st,stm32-counter";
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status = "disabled";
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};
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qdec {
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compatible = "st,stm32-qdec";
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status = "disabled";
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st,input-filter-level = <NO_FILTER>;
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};
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};
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timers5: timers@40000c00 {
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compatible = "st,stm32-counter";
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status = "disabled";
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};
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qdec {
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compatible = "st,stm32-qdec";
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status = "disabled";
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st,input-filter-level = <NO_FILTER>;
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};
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};
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timers9: timers@40014000 {

dts/arm/st/f4/stm32f405.dtsi

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status = "disabled";
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#pwm-cells = <3>;
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};
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qdec {
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compatible = "st,stm32-qdec";
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status = "disabled";
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st,input-filter-level = <NO_FILTER>;
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};
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};
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timers12: timers@40001800 {

dts/arm/st/f4/stm32f412.dtsi

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status = "disabled";
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#pwm-cells = <3>;
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};
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qdec {
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compatible = "st,stm32-qdec";
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status = "disabled";
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st,input-filter-level = <NO_FILTER>;
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};
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};
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timers12: timers@40001800 {
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# Copyright (c) 2022, Valerio Setti <[email protected]
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# SPDX-License-Identifier: Apache-2.0
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description: STM32 quadrature decoder
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compatible: "st,stm32-qdec"
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include:
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- name: base.yaml
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- name: pinctrl-device.yaml
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properties:
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pinctrl-0:
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required: true
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pinctrl-names:
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required: true
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st,input-polarity-inverted:
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type: boolean
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required: false
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description: Encoder is triggered by a falling edge on the input pin
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st,input-filter-level:
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type: int
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required: false
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description: |
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Intensity of the filter applied to the input signal. This is
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implemented by scaling the sampling frequency and adding a counter
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in which N consecutive samples with same value are needed to validate
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a transition.
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Mapping is as follows (F_clk is the timer's clock):
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0: No filter, sampling is done at F_dts (default value)
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1: Fs = F_clk, N=2
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2: Fs = F_clk, N=4
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3: Fs = F_clk, N=8
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4: Fs = F_clk/2, N=6
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5: Fs = F_clk/2, N=8
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6: Fs = F_clk/4, N=6
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7: Fs = F_clk/4, N=8
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8: Fs = F_clk/8, N=6
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9: Fs = F_clk/8, N=8
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10: Fs = F_clk/16, N=5
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11: Fs = F_clk/16, N=6
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12: Fs = F_clk/16, N=8
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13: Fs = F_clk/32, N=5
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14: Fs = F_clk/32, N=6
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15: Fs = F_clk/32, N=8
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Default value is set by hardware at reset
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default: 0
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enum:
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- 0 # No filter
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- 1 # FDIV1_N2
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- 2 # FDIV1_N4
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- 3 # FDIV1_N8
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- 4 # FDIV2_N6
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- 5 # FDIV2_N8
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- 6 # FDIV4_N6
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- 7 # FDIV4_N8
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- 8 # FDIV8_N6
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- 9 # FDIV8_N8
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- 10 # FDIV16_N5
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- 11 # FDIV16_N6
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- 12 # FDIV16_N8
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- 13 # FDIV32_N5
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- 14 # FDIV32_N6
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- 15 # FDIV32_N8
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st,counts-per-revolution:
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type: int
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required: true
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description: |
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This is a number >= 1 that is used to determine how many revolutions
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were done based on the current counter's value.
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/*
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* Copyright 2022 Valerio Setti <[email protected]>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_QDEC_STM32_H_
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#define ZEPHYR_INCLUDE_DT_BINDINGS_QDEC_STM32_H_
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#define NO_FILTER 0
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#define FDIV1_N2 1
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#define FDIV1_N4 2
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#define FDIV1_N8 3
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#define FDIV2_N6 4
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#define FDIV2_N8 5
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#define FDIV4_N6 6
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#define FDIV4_N8 7
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#define FDIV8_N6 8
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#define FDIV8_N8 9
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#define FDIV16_N5 10
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#define FDIV16_N6 11
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#define FDIV16_N8 12
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#define FDIV32_N5 13
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#define FDIV32_N6 14
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#define FDIV32_N8 15
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#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_QDEC_STM32_H_ */

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