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LucasTambor
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soc: espressif: Add hardware initialization
Bring hardware initialization to zephyr code base. Signed-off-by: Lucas Tamborrino <[email protected]>
1 parent 2df905d commit cdbd2b5

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21 files changed

+802
-145
lines changed

21 files changed

+802
-145
lines changed

‎soc/espressif/common/include/hw_init.h‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,12 @@
1+
/*
2+
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#ifndef _SOC_ESPRESSIF_COMMON_HW_INIT_H_
8+
#define _SOC_ESPRESSIF_COMMON_HW_INIT_H_
9+
10+
int hardware_init(void);
11+
12+
#endif /* _SOC_ESPRESSIF_COMMON_HW_INIT_H_ */

‎soc/espressif/common/loader.c‎

Lines changed: 95 additions & 74 deletions
Original file line numberDiff line numberDiff line change
@@ -14,62 +14,84 @@
1414
#include <esp_rom_sys.h>
1515
#include <esp_err.h>
1616

17-
#define MMU_FLASH_MASK (~(CONFIG_MMU_PAGE_SIZE - 1))
18-
1917
#include <esp_app_format.h>
2018
#include <zephyr/storage/flash_map.h>
21-
#include "esp_rom_uart.h"
22-
#include "esp_flash.h"
23-
#include "esp_log.h"
24-
#include "bootloader_init.h"
25-
#include "bootloader_random.h"
26-
#include "bootloader_soc.h"
19+
#include <esp_rom_uart.h>
20+
#include <esp_flash.h>
21+
#include <esp_log.h>
22+
#include <bootloader_clock.h>
23+
#include <bootloader_common.h>
24+
25+
#include <esp_cpu.h>
26+
27+
#if CONFIG_SOC_SERIES_ESP32C6
28+
#include <soc/hp_apm_reg.h>
29+
#include <soc/lp_apm_reg.h>
30+
#include <soc/lp_apm0_reg.h>
31+
#include <soc/pcr_reg.h>
32+
#endif /* CONFIG_SOC_SERIES_ESP32C6 */
33+
34+
#include <esp_flash_internal.h>
35+
#include <bootloader_flash.h>
36+
#include <bootloader_flash_priv.h>
37+
#include <hal/efuse_ll.h>
38+
#include <hal/efuse_hal.h>
39+
#include <hal/wdt_hal.h>
40+
#include <soc/chip_revision.h>
41+
#include <soc/rtc.h>
42+
#ifndef CONFIG_SOC_SERIES_ESP32
43+
#include <soc/assist_debug_reg.h>
44+
#include <soc/system_reg.h>
45+
#endif
46+
47+
#include "hw_init.h"
48+
#include "soc_init.h"
49+
#include "soc_random.h"
2750

2851
#define TAG "boot"
2952

3053
#define CHECKSUM_ALIGN 16
31-
#define IS_PADD(addr) (addr == 0)
32-
#define IS_DRAM(addr) (addr >= SOC_DRAM_LOW && addr < SOC_DRAM_HIGH)
33-
#define IS_IRAM(addr) (addr >= SOC_IRAM_LOW && addr < SOC_IRAM_HIGH)
34-
#define IS_IROM(addr) (addr >= SOC_IROM_LOW && addr < SOC_IROM_HIGH)
35-
#define IS_DROM(addr) (addr >= SOC_DROM_LOW && addr < SOC_DROM_HIGH)
36-
#define IS_SRAM(addr) (IS_IRAM(addr) || IS_DRAM(addr))
37-
#define IS_MMAP(addr) (IS_IROM(addr) || IS_DROM(addr))
38-
#define IS_NONE(addr) (!IS_IROM(addr) && !IS_DROM(addr) \
39-
&& !IS_IRAM(addr) && !IS_DRAM(addr) && !IS_PADD(addr))
54+
#define IS_PADD(addr) (addr == 0)
55+
#define IS_DRAM(addr) (addr >= SOC_DRAM_LOW && addr < SOC_DRAM_HIGH)
56+
#define IS_IRAM(addr) (addr >= SOC_IRAM_LOW && addr < SOC_IRAM_HIGH)
57+
#define IS_IROM(addr) (addr >= SOC_IROM_LOW && addr < SOC_IROM_HIGH)
58+
#define IS_DROM(addr) (addr >= SOC_DROM_LOW && addr < SOC_DROM_HIGH)
59+
#define IS_SRAM(addr) (IS_IRAM(addr) || IS_DRAM(addr))
60+
#define IS_MMAP(addr) (IS_IROM(addr) || IS_DROM(addr))
61+
#define IS_NONE(addr) \
62+
(!IS_IROM(addr) && !IS_DROM(addr) && !IS_IRAM(addr) && !IS_DRAM(addr) && !IS_PADD(addr))
4063

4164
#define HDR_ATTR __attribute__((section(".entry_addr"))) __attribute__((used))
4265

4366
void __start(void);
4467
static HDR_ATTR void (*_entry_point)(void) = &__start;
4568

46-
extern esp_image_header_t bootloader_image_hdr;
69+
esp_image_header_t WORD_ALIGNED_ATTR bootloader_image_hdr;
4770
extern uint32_t _image_irom_start, _image_irom_size, _image_irom_vaddr;
4871
extern uint32_t _image_drom_start, _image_drom_size, _image_drom_vaddr;
4972

5073
#ifndef CONFIG_MCUBOOT
51-
static uint32_t _app_irom_start = (FIXED_PARTITION_OFFSET(slot0_partition) +
52-
(uint32_t)&_image_irom_start);
74+
static uint32_t _app_irom_start =
75+
(FIXED_PARTITION_OFFSET(slot0_partition) + (uint32_t)&_image_irom_start);
5376
static uint32_t _app_irom_size = (uint32_t)&_image_irom_size;
5477

55-
static uint32_t _app_drom_start = (FIXED_PARTITION_OFFSET(slot0_partition) +
56-
(uint32_t)&_image_drom_start);
78+
static uint32_t _app_drom_start =
79+
(FIXED_PARTITION_OFFSET(slot0_partition) + (uint32_t)&_image_drom_start);
5780
static uint32_t _app_drom_size = (uint32_t)&_image_drom_size;
5881
#endif
5982

6083
static uint32_t _app_irom_vaddr = ((uint32_t)&_image_irom_vaddr);
6184
static uint32_t _app_drom_vaddr = ((uint32_t)&_image_drom_vaddr);
6285

6386
#ifndef CONFIG_BOOTLOADER_MCUBOOT
64-
static esp_err_t spi_flash_read(uint32_t address, void *buffer, size_t length)
87+
static int spi_flash_read(uint32_t address, void *buffer, size_t length)
6588
{
6689
return esp_flash_read(NULL, buffer, address, length);
6790
}
6891
#endif /* CONFIG_BOOTLOADER_MCUBOOT */
6992

70-
void map_rom_segments(uint32_t app_drom_start, uint32_t app_drom_vaddr,
71-
uint32_t app_drom_size, uint32_t app_irom_start,
72-
uint32_t app_irom_vaddr, uint32_t app_irom_size)
93+
void map_rom_segments(uint32_t app_drom_start, uint32_t app_drom_vaddr, uint32_t app_drom_size,
94+
uint32_t app_irom_start, uint32_t app_irom_vaddr, uint32_t app_irom_size)
7395
{
7496
uint32_t app_irom_start_aligned = app_irom_start & MMU_FLASH_MASK;
7597
uint32_t app_irom_vaddr_aligned = app_irom_vaddr & MMU_FLASH_MASK;
@@ -88,8 +110,7 @@ void map_rom_segments(uint32_t app_drom_start, uint32_t app_drom_vaddr,
88110

89111
while (segments++ < 16) {
90112

91-
if (spi_flash_read(offset, &segment_hdr,
92-
sizeof(esp_image_segment_header_t)) != ESP_OK) {
113+
if (spi_flash_read(offset, &segment_hdr, sizeof(esp_image_segment_header_t)) != 0) {
93114
ESP_EARLY_LOGE(TAG, "Failed to read segment header at %x", offset);
94115
abort();
95116
}
@@ -101,13 +122,14 @@ void map_rom_segments(uint32_t app_drom_start, uint32_t app_drom_vaddr,
101122
}
102123

103124
ESP_EARLY_LOGI(TAG, "%s: lma 0x%08x vma 0x%08x len 0x%-6x (%u)",
104-
IS_NONE(segment_hdr.load_addr) ? "???" :
105-
IS_MMAP(segment_hdr.load_addr) ?
106-
IS_IROM(segment_hdr.load_addr) ? "IMAP" : "DMAP" :
107-
IS_PADD(segment_hdr.load_addr) ? "padd" :
108-
IS_DRAM(segment_hdr.load_addr) ? "DRAM" : "IRAM",
109-
offset + sizeof(esp_image_segment_header_t),
110-
segment_hdr.load_addr, segment_hdr.data_len, segment_hdr.data_len);
125+
IS_NONE(segment_hdr.load_addr) ? "???"
126+
: IS_MMAP(segment_hdr.load_addr)
127+
? IS_IROM(segment_hdr.load_addr) ? "IMAP" : "DMAP"
128+
: IS_PADD(segment_hdr.load_addr) ? "padd"
129+
: IS_DRAM(segment_hdr.load_addr) ? "DRAM"
130+
: "IRAM",
131+
offset + sizeof(esp_image_segment_header_t), segment_hdr.load_addr,
132+
segment_hdr.data_len, segment_hdr.data_len);
111133

112134
/* Fix drom and irom produced be the linker, as it could
113135
* be invalidated by the elf2image and flash load offset
@@ -153,34 +175,32 @@ void map_rom_segments(uint32_t app_drom_start, uint32_t app_drom_vaddr,
153175
#if CONFIG_SOC_SERIES_ESP32
154176
int rc = 0;
155177
uint32_t drom_page_count =
156-
(app_drom_size + CONFIG_MMU_PAGE_SIZE - 1) / CONFIG_MMU_PAGE_SIZE;
178+
(app_drom_size + CONFIG_MMU_PAGE_SIZE - 1) / CONFIG_MMU_PAGE_SIZE;
157179

158-
rc |= cache_flash_mmu_set(0, 0, app_drom_vaddr_aligned,
159-
app_drom_start_aligned, 64, drom_page_count);
160-
rc |= cache_flash_mmu_set(1, 0, app_drom_vaddr_aligned,
161-
app_drom_start_aligned, 64, drom_page_count);
180+
rc |= cache_flash_mmu_set(0, 0, app_drom_vaddr_aligned, app_drom_start_aligned, 64,
181+
drom_page_count);
182+
rc |= cache_flash_mmu_set(1, 0, app_drom_vaddr_aligned, app_drom_start_aligned, 64,
183+
drom_page_count);
162184

163185
uint32_t irom_page_count =
164-
(app_irom_size + CONFIG_MMU_PAGE_SIZE - 1) / CONFIG_MMU_PAGE_SIZE;
186+
(app_irom_size + CONFIG_MMU_PAGE_SIZE - 1) / CONFIG_MMU_PAGE_SIZE;
165187

166-
rc |= cache_flash_mmu_set(0, 0, app_irom_vaddr_aligned,
167-
app_irom_start_aligned, 64, irom_page_count);
168-
rc |= cache_flash_mmu_set(1, 0, app_irom_vaddr_aligned,
169-
app_irom_start_aligned, 64, irom_page_count);
188+
rc |= cache_flash_mmu_set(0, 0, app_irom_vaddr_aligned, app_irom_start_aligned, 64,
189+
irom_page_count);
190+
rc |= cache_flash_mmu_set(1, 0, app_irom_vaddr_aligned, app_irom_start_aligned, 64,
191+
irom_page_count);
170192
if (rc != 0) {
171193
ESP_EARLY_LOGE(TAG, "Failed to setup XIP, aborting");
172194
abort();
173195
}
174196
#else
175197
uint32_t actual_mapped_len = 0;
176198

177-
mmu_hal_map_region(0, MMU_TARGET_FLASH0,
178-
app_drom_vaddr_aligned, app_drom_start_aligned,
179-
app_drom_size, &actual_mapped_len);
199+
mmu_hal_map_region(0, MMU_TARGET_FLASH0, app_drom_vaddr_aligned, app_drom_start_aligned,
200+
app_drom_size, &actual_mapped_len);
180201

181-
mmu_hal_map_region(0, MMU_TARGET_FLASH0,
182-
app_irom_vaddr_aligned, app_irom_start_aligned,
183-
app_irom_size, &actual_mapped_len);
202+
mmu_hal_map_region(0, MMU_TARGET_FLASH0, app_irom_vaddr_aligned, app_irom_start_aligned,
203+
app_irom_size, &actual_mapped_len);
184204
#endif /* CONFIG_SOC_SERIES_ESP32 */
185205

186206
/* ----------------------Enable corresponding buses---------------- */
@@ -206,22 +226,20 @@ void map_rom_segments(uint32_t app_drom_start, uint32_t app_drom_vaddr,
206226

207227
#if !defined(CONFIG_SOC_SERIES_ESP32) && !defined(CONFIG_SOC_SERIES_ESP32S2)
208228
/* Configure the Cache MMU size for instruction and rodata in flash. */
209-
uint32_t cache_mmu_irom_size = ((app_irom_size + CONFIG_MMU_PAGE_SIZE - 1) /
210-
CONFIG_MMU_PAGE_SIZE) * sizeof(uint32_t);
229+
uint32_t cache_mmu_irom_size =
230+
((app_irom_size + CONFIG_MMU_PAGE_SIZE - 1) / CONFIG_MMU_PAGE_SIZE) *
231+
sizeof(uint32_t);
211232

212233
/* Split the cache usage by the segment sizes */
213-
Cache_Set_IDROM_MMU_Size(cache_mmu_irom_size,
214-
CACHE_DROM_MMU_MAX_END - cache_mmu_irom_size);
234+
Cache_Set_IDROM_MMU_Size(cache_mmu_irom_size, CACHE_DROM_MMU_MAX_END - cache_mmu_irom_size);
215235
#endif
216236
/* Show map segments continue using same log format as during MCUboot phase */
217-
ESP_EARLY_LOGI(TAG, "%s segment: paddr=%08xh, vaddr=%08xh, size=%05Xh (%6d) map",
218-
"DROM",
219-
app_drom_start_aligned, app_drom_vaddr_aligned,
220-
app_drom_size, app_drom_size);
221-
ESP_EARLY_LOGI(TAG, "%s segment: paddr=%08xh, vaddr=%08xh, size=%05Xh (%6d) map",
222-
"IROM",
223-
app_irom_start_aligned, app_irom_vaddr_aligned,
224-
app_irom_size, app_irom_size);
237+
ESP_EARLY_LOGI(TAG, "%s segment: paddr=%08xh, vaddr=%08xh, size=%05Xh (%6d) map", "DROM",
238+
app_drom_start_aligned, app_drom_vaddr_aligned, app_drom_size,
239+
app_drom_size);
240+
ESP_EARLY_LOGI(TAG, "%s segment: paddr=%08xh, vaddr=%08xh, size=%05Xh (%6d) map", "IROM",
241+
app_irom_start_aligned, app_irom_vaddr_aligned, app_irom_size,
242+
app_irom_size);
225243
esp_rom_uart_tx_wait_idle(0);
226244
}
227245

@@ -233,29 +251,32 @@ void __start(void)
233251
* relaxed by the linker to access something relative to __global_pointer$)
234252
*/
235253
__asm__ __volatile__(".option push\n"
236-
".option norelax\n"
237-
"la gp, __global_pointer$\n"
238-
".option pop");
254+
".option norelax\n"
255+
"la gp, __global_pointer$\n"
256+
".option pop");
239257
#endif /* CONFIG_RISCV_GP */
240258

241259
#ifndef CONFIG_BOOTLOADER_MCUBOOT
242260
/* Init fundamental components */
243-
if (bootloader_init()) {
261+
if (hardware_init()) {
244262
ESP_EARLY_LOGE(TAG, "HW init failed, aborting");
245263
abort();
246264
}
247265
#endif
248266

249267
#if !defined(CONFIG_MCUBOOT) && !defined(CONFIG_SOC_ESP32S3_APPCPU)
250-
map_rom_segments(_app_drom_start, _app_drom_vaddr, _app_drom_size,
251-
_app_irom_start, _app_irom_vaddr, _app_irom_size);
268+
map_rom_segments(_app_drom_start, _app_drom_vaddr, _app_drom_size, _app_irom_start,
269+
_app_irom_vaddr, _app_irom_size);
252270
#endif
253-
271+
#ifndef CONFIG_SOC_SERIES_ESP32C2
254272
/* Disable RNG entropy source as it was already used */
255-
bootloader_random_disable();
256-
273+
soc_random_disable();
274+
#endif /* CONFIG_SOC_SERIES_ESP32C2 */
275+
#if defined(CONFIG_SOC_SERIES_ESP32S3) || defined(CONFIG_SOC_SERIES_ESP32C3)
257276
/* Disable glitch detection as it can be falsely triggered by EMI interference */
258-
bootloader_ana_clock_glitch_reset_config(false);
259-
277+
ESP_EARLY_LOGI(TAG, "Disabling glitch detection");
278+
ana_clock_glitch_reset_config(false);
279+
#endif /* CONFIG_SOC_SERIES_ESP32S2 */
280+
ESP_EARLY_LOGI(TAG, "Jumping to the main image...");
260281
__esp_platform_start();
261282
}

‎soc/espressif/esp32/CMakeLists.txt‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,8 @@ endif()
1212

1313
zephyr_include_directories(.)
1414

15+
zephyr_sources_ifndef(CONFIG_BOOTLOADER_MCUBOOT hw_init.c)
16+
1517
zephyr_library_sources_ifdef(CONFIG_NEWLIB_LIBC newlib_fix.c)
1618

1719
zephyr_library_sources_ifdef(CONFIG_GDBSTUB gdbstub.c)

‎soc/espressif/esp32/default.ld‎

Lines changed: 12 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -274,6 +274,12 @@ SECTIONS
274274
*libzephyr.a:log_output.*(.literal .text .literal.* .text.*)
275275
*libzephyr.a:log_backend_uart.*(.literal .text .literal.* .text.*)
276276
*libzephyr.a:loader.*(.literal .text .literal.* .text.*)
277+
*libzephyr.a:flash_init.*(.literal .text .literal.* .text.*)
278+
*libzephyr.a:soc_flash_init.*(.literal .text .literal.* .text.*)
279+
*libzephyr.a:console_init.*(.literal .text .literal.* .text.*)
280+
*libzephyr.a:soc_random.*(.literal .text .literal.* .text.*)
281+
*libzephyr.a:soc_init.*(.literal .text .literal.* .text.*)
282+
*libzephyr.a:hw_init.*(.literal .text .literal.* .text.*)
277283
*libzephyr.a:rtc_*.*(.literal .text .literal.* .text.*)
278284
*libzephyr.a:cpu_util.*(.literal .text .literal.* .text.*)
279285
*libdrivers__flash.a:flash_esp32.*(.literal .text .literal.* .text.*)
@@ -403,21 +409,14 @@ SECTIONS
403409
.loader.text :
404410
{
405411
. = ALIGN(4);
406-
*libzephyr.a:bootloader_init.*(.literal .text .literal.* .text.*)
407-
*libzephyr.a:bootloader_esp32.*(.literal .text .literal.* .text.*)
408412
*libzephyr.a:bootloader_clock_init.*(.literal .text .literal.* .text.*)
409413
*libzephyr.a:bootloader_wdt.*(.literal .text .literal.* .text.*)
410414
*libzephyr.a:bootloader_flash.*(.literal .text .literal.* .text.*)
411-
*libzephyr.a:bootloader_flash_config_esp32.*(.literal .text .literal.* .text.*)
412415
*libzephyr.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
413-
*libzephyr.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
414-
*libzephyr.a:bootloader_common.*(.literal .text .literal.* .text.*)
415-
*libzephyr.a:bootloader_mem.*(.literal .text .literal.* .text.*)
416416
*libzephyr.a:bootloader_random.*(.literal .text .literal.* .text.*)
417417
*libzephyr.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
418418
*libzephyr.a:bootloader_utility.*(.literal .text .literal.* .text.*)
419419
*libzephyr.a:bootloader_sha.*(.literal .text .literal.* .text.*)
420-
*libzephyr.a:bootloader_console.*(.literal .text .literal.* .text.*)
421420
*libzephyr.a:bootloader_panic.*(.literal .text .literal.* .text.*)
422421

423422
*libzephyr.a:esp_image_format.*(.literal .text .literal.* .text.*)
@@ -520,6 +519,12 @@ SECTIONS
520519
*libzephyr.a:log_backend_uart.*(.rodata .rodata.*)
521520
*libzephyr.a:log_output.*(.rodata .rodata.*)
522521
*libzephyr.a:loader.*(.rodata .rodata.*)
522+
*libzephyr.a:flash_init.*(.rodata .rodata.*)
523+
*libzephyr.a:soc_flash_init.*(.rodata .rodata.*)
524+
*libzephyr.a:console_init.*(.rodata .rodata.*)
525+
*libzephyr.a:soc_random.*(.rodata .rodata.*)
526+
*libzephyr.a:soc_init.*(.rodata .rodata.*)
527+
*libzephyr.a:hw_init.*(.rodata .rodata.*)
523528
*libdrivers__flash.a:flash_esp32.*(.rodata .rodata.*)
524529
*libdrivers__serial.a:uart_esp32.*(.rodata .rodata.*)
525530
*libzephyr.a:esp_memory_utils.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
@@ -625,14 +630,10 @@ SECTIONS
625630
{
626631
. = ALIGN(4);
627632
_loader_data_start = ABSOLUTE(.);
628-
*libzephyr.a:bootloader_init.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
629633
*libzephyr.a:bootloader_esp32.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
630634
*libzephyr.a:bootloader_clock_init.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
631635
*libzephyr.a:bootloader_wdt.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
632636
*libzephyr.a:bootloader_flash.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
633-
*libzephyr.a:bootloader_flash_config_esp32.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
634-
*libzephyr.a:bootloader_common.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
635-
*libzephyr.a:bootloader_common_loader.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
636637
*libzephyr.a:bootloader_efuse.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)
637638

638639
*libzephyr.a:cpu_util.*(.rodata .rodata.* .sdata2 .sdata2.* .srodata .srodata.*)

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