samples: drivers: memc: enable support for FRDM_RW612

Enable support for FRDM_RW612 with memc driver sample, using attached
aps6404l PSRAM.

Signed-off-by: David Missael Maciel <[email protected]>

Author: davidmissael

samples/drivers/memc/boards/frdm_rw612.conf

@@ -0,0 +1,22 @@
+# Copyright 2024 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+# In order to safely access the PSRAM on port B of the RW FlexSPI peripheral,
+# the QSPI flash on port A must be configured by the application. Otherwise,
+# the PSRAM configuration will overwrite the LUT entries for the QSPI flash,
+# and the application will no longer be able to XIP from the flash.
+# To make sure the QSPI flash is configured, enable flash drivers.
+CONFIG_FLASH=y
+
+# Initialization priorities are critical here. The FlexSPI MEMC driver must
+# initialize first. Then, the QSPI flash driver must initialize to program
+# the LUT table for port A. Finally, the PSRAM driver can initialize and
+# program the LUT table for port B
+CONFIG_MEMC_MCUX_FLEXSPI_INIT_PRIORITY=0
+CONFIG_FLASH_INIT_PRIORITY=50
+CONFIG_MEMC_INIT_PRIORITY=60
+
+# This board has the PSRAM attached to the same FLEXSPI device as the flash
+# chip used for XIP, so we must explicitly enable the FLEXSPI MEMC driver
+# to reconfigure the flash device it is executing from
+CONFIG_MEMC_MCUX_FLEXSPI_INIT_XIP=y

samples/drivers/memc/boards/frdm_rw612.overlay

@@ -0,0 +1,51 @@
+/*
+ * Copyright 2024 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	aliases {
+		sram-ext = &aps6404l;
+	};
+};
+
+&w25q512jvfiq {
+	/*
+	 * Lower max FlexSPI frequency to 109MHz, as the PSRAM does not support
+	 * higher frequencies at 3.3V
+	 */
+	spi-max-frequency = <109000000>;
+};
+
+&aps6404l {
+	status = "okay";
+};
+
+&pinctrl {
+	pinmux_flexspi_safe: pinmux-flexspi-safe {
+		group0 {
+			pinmux = <IO_MUX_QUAD_SPI_PSRAM_IO35
+				IO_MUX_QUAD_SPI_PSRAM_IO36
+				IO_MUX_QUAD_SPI_PSRAM_IO38
+				IO_MUX_QUAD_SPI_PSRAM_IO39
+				IO_MUX_QUAD_SPI_PSRAM_IO40
+				IO_MUX_QUAD_SPI_PSRAM_IO41>;
+			slew-rate = "normal";
+		};
+
+		group1 {
+			pinmux = <IO_MUX_QUAD_SPI_PSRAM_IO37>;
+			slew-rate = "normal";
+			bias-pull-down;
+		};
+	};
+};
+
+/* Override pin control state to use one that only changes the PSRAM pin
+ * configuration
+ */
+&flexspi {
+	pinctrl-0 = <&pinmux_flexspi_safe>;
+	pinctrl-names = "default";
+};