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drivers: nrf_wifi: Add debug shell
Add a debug shell to the driver to provide advanced debug support such as reading/writing to RPU memory and registers etc. Signed-off-by: Sachin D Kulkarni <[email protected]>
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‎drivers/wifi/nrf_wifi/CMakeLists.txt

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Original file line numberDiff line numberDiff line change
@@ -62,6 +62,11 @@ zephyr_library_sources_ifdef(CONFIG_NRF70_UTIL
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src/wifi_util.c
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)
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65+
zephyr_library_sources_ifdef(CONFIG_NRF70_DEBUG_SHELL
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src/shell.c
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src/debug_shell.c
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)
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6570
zephyr_compile_definitions_ifdef(CONFIG_NRF70_ON_QSPI
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# These are XIP related anomalies and aren't applicable for nRF7002 and cause
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# throughput issues.

‎drivers/wifi/nrf_wifi/Kconfig.nrfwifi

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@@ -210,6 +210,10 @@ config NRF70_UTIL
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depends on SHELL
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bool "Utility shell in nRF70 driver"
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config NRF70_DEBUG_SHELL
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depends on SHELL
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bool "Debug shell in nRF70 driver"
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213217
config NRF70_QSPI_LOW_POWER
214218
bool "low power mode in QSPI"
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default y if NRF_WIFI_LOW_POWER

‎drivers/wifi/nrf_wifi/src/debug_shell.c

Lines changed: 364 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,364 @@
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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* @file
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* @brief NRF Wi-Fi debug shell module
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*/
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#include <stdlib.h>
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#include <zephyr/shell/shell.h>
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#include "host_rpu_umac_if.h"
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#include "fmac_main.h"
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extern struct nrf_wifi_drv_priv_zep rpu_drv_priv_zep;
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struct nrf_wifi_ctx_zep *dbg_ctx = &rpu_drv_priv_zep.rpu_ctx_zep;
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static int nrf_wifi_dbg_read_mem(const struct shell *sh,
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size_t argc,
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const char *argv[])
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{
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enum nrf_wifi_status status;
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struct nrf_wifi_fmac_dev_ctx *fmac_dev_ctx;
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char *ptr;
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unsigned long mem_type;
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unsigned long mem_offset;
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unsigned long num_words;
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unsigned int mem_val;
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unsigned int mem_start_addr;
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unsigned int mem_end_addr;
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unsigned int i;
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fmac_dev_ctx = dbg_ctx->rpu_ctx;
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mem_type = strtoul(argv[1], &ptr, 10);
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mem_offset = strtoul(argv[2], &ptr, 10);
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num_words = strtoul(argv[3], &ptr, 10);
38+
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if (mem_type == 0) {
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mem_start_addr = RPU_ADDR_PKTRAM_START + (mem_offset * 4);
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mem_end_addr = RPU_ADDR_PKTRAM_END;
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} else if (mem_type == 1) {
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mem_start_addr = RPU_ADDR_GRAM_START + (mem_offset * 4);
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mem_end_addr = RPU_ADDR_GRAM_END;
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} else {
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shell_fprintf(sh,
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SHELL_ERROR,
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"Invalid memory type(%lu).\n",
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mem_type);
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return -ENOEXEC;
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}
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if ((mem_start_addr % 4) != 0) {
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shell_fprintf(sh,
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SHELL_ERROR,
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"Invalid memory word offset(%lu). Needs to be a multiple of 4\n",
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mem_offset);
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return -ENOEXEC;
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}
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if (mem_start_addr + (num_words * 4) - 1 > mem_end_addr) {
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shell_fprintf(sh,
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SHELL_ERROR,
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"Invalid number of words(%lu). Exceeds memory region\n",
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num_words);
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return -ENOEXEC;
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}
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for (i = 0; i < (num_words * 4); i += 4) {
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status = hal_rpu_mem_read(fmac_dev_ctx->hal_dev_ctx,
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&mem_val,
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mem_start_addr + i,
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sizeof(mem_val));
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if (status != NRF_WIFI_STATUS_SUCCESS) {
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shell_fprintf(sh,
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SHELL_ERROR,
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"Failed to read memory at 0x%x.\n",
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mem_start_addr + i);
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return -ENOEXEC;
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}
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if (i % 16 == 0) {
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shell_fprintf(sh,
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SHELL_INFO,
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"\n0x%x: ", mem_start_addr + i);
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}
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shell_fprintf(sh,
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SHELL_INFO,
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"0x%08x ",
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mem_val);
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}
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shell_fprintf(sh,
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SHELL_INFO,
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"\n");
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return 0;
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}
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101+
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static int nrf_wifi_dbg_write_mem(const struct shell *sh,
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size_t argc,
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const char *argv[])
105+
{
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enum nrf_wifi_status status;
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struct nrf_wifi_fmac_dev_ctx *fmac_dev_ctx;
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char *ptr;
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unsigned long mem_type;
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unsigned long mem_offset;
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unsigned int val;
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unsigned int mem_start_addr;
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unsigned int mem_end_addr;
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fmac_dev_ctx = dbg_ctx->rpu_ctx;
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mem_type = strtoul(argv[1], &ptr, 10);
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mem_offset = strtoul(argv[2], &ptr, 10);
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val = strtoul(argv[3], &ptr, 10);
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if (mem_type == 0) {
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mem_start_addr = RPU_ADDR_PKTRAM_START + (mem_offset * 4);
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mem_end_addr = RPU_ADDR_PKTRAM_END;
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} else if (mem_type == 1) {
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mem_start_addr = RPU_ADDR_GRAM_START + (mem_offset * 4);
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mem_end_addr = RPU_ADDR_GRAM_END;
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} else {
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shell_fprintf(sh,
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SHELL_ERROR,
129+
"Invalid memory type(%lu).\n",
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mem_type);
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return -ENOEXEC;
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}
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if ((mem_start_addr % 4) != 0) {
135+
shell_fprintf(sh,
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SHELL_ERROR,
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"Invalid memory word offset(%lu). Needs to be a multiple of 4\n",
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mem_offset);
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return -ENOEXEC;
140+
}
141+
142+
if (mem_start_addr + 3 > mem_end_addr) {
143+
shell_fprintf(sh,
144+
SHELL_ERROR,
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"Invalid memory word offset. Exceeds memory region\n");
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return -ENOEXEC;
147+
}
148+
149+
status = hal_rpu_mem_write(fmac_dev_ctx->hal_dev_ctx,
150+
mem_start_addr,
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&val,
152+
sizeof(val));
153+
154+
if (status != NRF_WIFI_STATUS_SUCCESS) {
155+
shell_fprintf(sh,
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SHELL_ERROR,
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"Failed to write memory at 0x%x.\n",
158+
mem_start_addr);
159+
return -ENOEXEC;
160+
}
161+
162+
return 0;
163+
}
164+
165+
166+
static int nrf_wifi_dbg_read_reg(const struct shell *sh,
167+
size_t argc,
168+
const char *argv[])
169+
{
170+
enum nrf_wifi_status status;
171+
struct nrf_wifi_fmac_dev_ctx *fmac_dev_ctx;
172+
char *ptr;
173+
unsigned long reg_type;
174+
unsigned long reg_offset;
175+
unsigned long num_regs;
176+
unsigned int reg_val;
177+
unsigned int reg_start_addr;
178+
unsigned int reg_end_addr;
179+
unsigned int i;
180+
181+
fmac_dev_ctx = dbg_ctx->rpu_ctx;
182+
reg_type = strtoul(argv[1], &ptr, 10);
183+
reg_offset = strtoul(argv[2], &ptr, 10);
184+
num_regs = strtoul(argv[3], &ptr, 10);
185+
186+
if (reg_type == 0) {
187+
reg_start_addr = RPU_ADDR_SBUS_START + (reg_offset * 4);
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reg_end_addr = RPU_ADDR_SBUS_END;
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} else if (reg_type == 1) {
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reg_start_addr = RPU_ADDR_PBUS_START + (reg_offset * 4);
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reg_end_addr = RPU_ADDR_PBUS_END;
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} else {
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shell_fprintf(sh,
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SHELL_ERROR,
195+
"Invalid register type(%lu).\n",
196+
reg_type);
197+
return -ENOEXEC;
198+
}
199+
200+
if ((reg_start_addr % 4) != 0) {
201+
shell_fprintf(sh,
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SHELL_ERROR,
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"Invalid register offset(%lu). Needs to be a multiple of 4\n",
204+
reg_offset);
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return -ENOEXEC;
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}
207+
208+
if (reg_start_addr + (num_regs * 4) - 1 > reg_end_addr) {
209+
shell_fprintf(sh,
210+
SHELL_ERROR,
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"Invalid number of registers(%lu). Exceeds bus region\n",
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num_regs);
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return -ENOEXEC;
214+
}
215+
216+
for (i = 0; i < num_regs * 4; i += 4) {
217+
status = hal_rpu_reg_read(fmac_dev_ctx->hal_dev_ctx,
218+
&reg_val,
219+
reg_start_addr + i);
220+
221+
if (status != NRF_WIFI_STATUS_SUCCESS) {
222+
shell_fprintf(sh,
223+
SHELL_ERROR,
224+
"Failed to read register at 0x%x.\n",
225+
reg_start_addr + i);
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return -ENOEXEC;
227+
}
228+
229+
shell_fprintf(sh,
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SHELL_INFO,
231+
"0x%x: 0x%08x\n",
232+
reg_start_addr + i,
233+
reg_val);
234+
}
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236+
shell_fprintf(sh,
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SHELL_INFO,
238+
"\n");
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return 0;
240+
}
241+
242+
243+
static int nrf_wifi_dbg_write_reg(const struct shell *sh,
244+
size_t argc,
245+
const char *argv[])
246+
{
247+
enum nrf_wifi_status status;
248+
struct nrf_wifi_fmac_dev_ctx *fmac_dev_ctx;
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char *ptr;
250+
unsigned long reg_type;
251+
unsigned long reg_offset;
252+
unsigned int val;
253+
unsigned int reg_start_addr;
254+
unsigned int reg_end_addr;
255+
256+
fmac_dev_ctx = dbg_ctx->rpu_ctx;
257+
reg_type = strtoul(argv[1], &ptr, 10);
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reg_offset = strtoul(argv[2], &ptr, 10);
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val = strtoul(argv[3], &ptr, 10);
260+
261+
if (reg_type == 0) {
262+
reg_start_addr = RPU_ADDR_SBUS_START + (reg_offset * 4);
263+
reg_end_addr = RPU_ADDR_SBUS_END;
264+
} else if (reg_type == 1) {
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reg_start_addr = RPU_ADDR_PBUS_START + (reg_offset * 4);
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reg_end_addr = RPU_ADDR_PBUS_END;
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} else {
268+
shell_fprintf(sh,
269+
SHELL_ERROR,
270+
"Invalid register type(%lu).\n",
271+
reg_type);
272+
return -ENOEXEC;
273+
}
274+
275+
if ((reg_start_addr % 4) != 0) {
276+
shell_fprintf(sh,
277+
SHELL_ERROR,
278+
"Invalid register offset(%lu). Needs to be a multiple of 4\n",
279+
reg_offset);
280+
return -ENOEXEC;
281+
}
282+
283+
if (reg_start_addr + 3 > reg_end_addr) {
284+
shell_fprintf(sh,
285+
SHELL_ERROR,
286+
"Invalid register offset. Exceeds bus region\n");
287+
return -ENOEXEC;
288+
}
289+
290+
status = hal_rpu_reg_write(fmac_dev_ctx->hal_dev_ctx,
291+
reg_start_addr,
292+
val);
293+
294+
if (status != NRF_WIFI_STATUS_SUCCESS) {
295+
shell_fprintf(sh,
296+
SHELL_ERROR,
297+
"Failed to write register at 0x%x.\n",
298+
reg_start_addr);
299+
return -ENOEXEC;
300+
}
301+
302+
return 0;
303+
}
304+
305+
306+
307+
SHELL_STATIC_SUBCMD_SET_CREATE(
308+
nrf70_dbg,
309+
SHELL_CMD_ARG(read_mem,
310+
NULL,
311+
"<mem_type> <offset> <num_words>\n"
312+
"where:\n"
313+
"<mem_type> : One of the memory regions below\n"
314+
"0 - PKTRAM\n"
315+
"1 - GRAM\n"
316+
"<offset> : Word offset in the memory region\n"
317+
"<num_words> : Number of words to read\n",
318+
nrf_wifi_dbg_read_mem,
319+
4,
320+
0),
321+
SHELL_CMD_ARG(write_mem,
322+
NULL,
323+
"<mem_type> <offset> <val>\n"
324+
"where:\n"
325+
"<mem_type> : One of the memory regions below\n"
326+
"0 - PKTRAM\n"
327+
"1 - GRAM\n"
328+
"<offset> : Word offset in the memory region\n"
329+
"<val> : Value to be written\n",
330+
nrf_wifi_dbg_write_mem,
331+
4,
332+
0),
333+
SHELL_CMD_ARG(read_reg,
334+
NULL,
335+
"<reg_type> <offset> <num_regs>\n"
336+
"where:\n"
337+
"<reg_type> : One of the bus regions below\n"
338+
"0 - SYSBUS\n"
339+
"1 - PBUS\n"
340+
"<offset> : Register offset\n"
341+
"<num_words> : Number of registers to read\n",
342+
nrf_wifi_dbg_read_reg,
343+
4,
344+
0),
345+
SHELL_CMD_ARG(write_reg,
346+
NULL,
347+
"<reg_type> <offset> <val>\n"
348+
"where:\n"
349+
"<reg_type> : One of the bus regions below\n"
350+
"0 - SYSBUS\n"
351+
"1 - PBUS\n"
352+
"<offset> : Register offset\n"
353+
"<val> : Value to be written\n",
354+
nrf_wifi_dbg_write_reg,
355+
4,
356+
0),
357+
SHELL_SUBCMD_SET_END
358+
);
359+
360+
361+
SHELL_SUBCMD_ADD((nrf70), dbg, &nrf70_dbg,
362+
"nRF70 advanced debug commands\n",
363+
NULL,
364+
0, 0);

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