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boards: Introduce Google Quincy Development Board
Quincy is a board created by Google for fingerprint-related functionality development. Signed-off-by: David Cross <[email protected]>
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‎boards/google/quincy/Kconfig.google_quincy‎

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# Copyright (c) 2024 Google LLC
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_GOOGLE_QUINCY
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select SOC_NPCX9MFP

‎boards/google/quincy/board.cmake‎

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# Copyright (c) 2024 Google LLC
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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(jlink "--device=Cortex-M4" "--speed=4000")
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board_runner_args(openocd --cmd-load "npcx_write_image")
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board_runner_args(openocd --cmd-verify "npcx_verify_image")
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

‎boards/google/quincy/board.yml‎

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board:
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name: google_quincy
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full_name: Quincy
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vendor: google
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socs:
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- name: npcx9mfp

‎boards/google/quincy/doc/index.rst‎

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.. zephyr:board:: google_quincy
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Overview
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********
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Google Quincy is a board created for fingerprint-related functionality
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development.
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The board has connectors for fingerprint sensors. A UART Console is exposed
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over μServo and USB connectors. The MCU can be flashed using μServo or SWD.
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Hardware
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********
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- NPCX99FPA0BX VFBGA144 package
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Peripheral Mapping
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===================
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- UART_1 (CONSOLE) TX/RX : GPIO65/GPIO64
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- UART_2 (PROG) TX/RX : GPIO86/GPIO75
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- SPI_0 (SHI) CS/CLK/MISO/MOSI : GPIO53/GPIO55/GPIO47/GPIO46
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- SPI_1 (SPIP) CS/CLK/MISO/MOSI : GPIOA6/GPIOA1/GPIO95/GPIOA3
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- SPI_2 (GP) CS/CLK/MISO/MOSI : GPIO30/GPIO25/GPIO24/GPIO31
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Programming and Debugging
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*************************
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Build application as usual for the ``google_quincy`` board target, and flash
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using μServo or an external J-Link connected to J4. If μServo is used, please
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follow the `Chromium EC Flashing Documentation`_ and
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`Chromium Servo Micro Documentation`_.
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Debugging
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=========
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Use SWD with a J-Link.
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References
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**********
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.. target-notes::
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.. _Chromium EC Flashing Documentation:
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https://chromium.googlesource.com/chromiumos/platform/ec#Flashing-via-the-servo-debug-board
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.. _Chromium Servo Micro Documentation:
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https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/master/docs/servo_micro.md

‎boards/google/quincy/google_quincy.dts‎

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/*
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* Copyright (c) 2024 Google LLC
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <nuvoton/npcx9mfp.dtsi>
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#include <nuvoton/npcx/npcx9/npcx9-pinctrl.dtsi>
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/ {
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model = "Google Quincy development board";
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compatible = "google,quincy-fpmcu";
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chosen {
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zephyr,console = &uart1;
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zephyr,shell-uart = &uart1;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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zephyr,flash-controller = &int_flash;
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};
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aliases {
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/* For watchdog sample */
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watchdog0 = &twd0;
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};
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};
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/* UART1: Servo UART (console) */
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&uart1 {
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/* Use UART1_SL2 ie. PIN64.65 */
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pinctrl-0 = <&uart1_2_sin_gp64
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&uart1_2_sout_gp65>;
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pinctrl-names = "default";
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current-speed = <115200>;
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status = "okay";
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};
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/* UART2: AP UART (Host Commands and MKBP) */
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&uart2 {
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pinctrl-0 = <&uart2_sin_gp75
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&uart2_sout_gp86>;
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pinctrl-names = "default";
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current-speed = <115200>;
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status = "okay";
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};
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/* SHI0: communication with the AP */
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&shi0 {
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status = "okay";
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pinctrl-0 = <&shi_gp46_47_53_55>;
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pinctrl-names = "default";
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};
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/* SPIP0: communication with the fingerprint sensor */
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&spip0 {
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pinctrl-0 = <&spip_sclk_mosi_miso_gp95_gpa1_gpa3_gpa5_sl
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&spip_sclk_mosi_miso_gp95_gpa1_gpa3_gpa5_no_spip_inv>;
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cs-gpios = <&gpioa 6 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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status = "okay";
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};

‎boards/google/quincy/google_quincy.yaml‎

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identifier: google_quincy
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name: Google Quincy Development Board
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type: mcu
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arch: arm
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toolchain:
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- zephyr
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- gnuarmemb
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ram: 512
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flash: 1024
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vendor: google
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supported:
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- clock
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- gpio
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- i2c
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- pm
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- pwm
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- spi
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- uart
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- watchdog

‎boards/google/quincy/google_quincy_defconfig‎

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# Copyright (c) 2024 Google Inc
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# SPDX-License-Identifier: Apache-2.0
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# General Kernel Options
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=15000000
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# Serial Drivers
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CONFIG_SERIAL=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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# Console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# GPIO Controller
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CONFIG_GPIO=y
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# Clock Controller
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CONFIG_CLOCK_CONTROL=y
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# Enable MPU and HW stack protection
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CONFIG_ARM_MPU=y
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CONFIG_HW_STACK_PROTECTION=y

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