drivers: ethernet: Add Xilinx Axi Ethernet Lite

This commit adds support for the Xilinx AXI Ethernet Lite device,
also known as the emaclite.
The emaclite is a light-weight 10/100 MII Ethernet device.
It foregoes a DMA to reduce chip area.
Instead, it uses memory-mapped transmit/receive buffers.
A selection of features can optionally be enabled:
- a second ("pong") RX/TX Buffer
- MDIO support
- Interrupt support
This driver handles the MAC functionality of the core;
a driver for the MDIO part is introduced separately
as an MDIO driver.

Signed-off-by: Eric Ackermann <[email protected]>

Author: WorldofJARcraft

drivers/ethernet/CMakeLists.txt

@@ -58,6 +58,7 @@ zephyr_library_sources_ifdef(CONFIG_ETH_SY1XX eth_sensry_sy1xx_mac.c)
 zephyr_library_sources_ifdef(CONFIG_ETH_TEST eth_test.c)
 zephyr_library_sources_ifdef(CONFIG_ETH_VIRTIO_NET eth_virtio_net.c)
 zephyr_library_sources_ifdef(CONFIG_ETH_W5500 eth_w5500.c)
+zephyr_library_sources_ifdef(CONFIG_ETH_XILINX_AXI_ETHERNET_LITE eth_xilinx_axi_ethernet_lite.c)
 zephyr_library_sources_ifdef(CONFIG_ETH_XILINX_AXIENET eth_xilinx_axienet.c)
 zephyr_library_sources_ifdef(CONFIG_ETH_XLNX_GEM eth_xlnx_gem.c)
 zephyr_library_sources_ifdef(CONFIG_ETH_XLNX_GEM phy_xlnx_gem.c)

drivers/ethernet/Kconfig

@@ -77,6 +77,7 @@ source "drivers/ethernet/Kconfig.sy1xx_mac"
 source "drivers/ethernet/Kconfig.test"
 source "drivers/ethernet/Kconfig.virtio_net"
 source "drivers/ethernet/Kconfig.w5500"
+source "drivers/ethernet/Kconfig.xilinx_axi_ethernet_lite"
 source "drivers/ethernet/Kconfig.xilinx_axienet"
 source "drivers/ethernet/Kconfig.xlnx_gem"
 source "drivers/ethernet/Kconfig.xmc4xxx"

drivers/ethernet/Kconfig.xilinx_axi_ethernet_lite

@@ -0,0 +1,24 @@
+#
+#Xilinx AXI Ethernet Lite
+#
+#Copyright(c) 2025, CISPA Helmholtz Center for Information Security
+#SPDX-License-Identifier: Apache-2.0
+#
+
+menuconfig ETH_XILINX_AXI_ETHERNET_LITE
+	bool "Xilinx AXI Ethernet Lite Driver"
+	default y
+	depends on DT_HAS_XLNX_XPS_ETHERNETLITE_3_00_A_MAC_ENABLED
+	depends on LITTLE_ENDIAN # byte order operations might break for BE
+	help
+	  Enable Xilinx AXI Ethernet Lite MAC driver, commonly found on Xilinx FPGAs and SoCs.
+
+config ETH_XILINX_AXI_ETHERNET_LITE_TIMER_PERIOD
+	int "Xilinx AXI Ethernet Lite Timer Period in ms"
+	default 1
+	depends on ETH_XILINX_AXI_ETHERNET_LITE
+	help
+	  Period for periodic RX timer task in AXI Ethernet Lite.
+	  Useful when either no IRQs are available at all
+	  or when IRQs are not handled reliably by the interrupt controller.
+	  Set to 0 to disable this feature.