drivers: can: Implement stm32fd driver

This driver is the SoC specific implementation of the
Bosch M_CAN IP.

Signed-off-by: Alexander Wachter <[email protected]>

Author: alexanderwachter

drivers/can/Kconfig.stm32fd

@@ -1,9 +1,17 @@
 # STM32 CAN configuration options
-if CAN_MCAN && SOC_SERIES_STM32G4X
+
+# Copyright (c) 2020 Alexander Wachter
+# SPDX-License-Identifier: Apache-2.0
+
+DT_COMPAT_STM32_FDCAN := st,stm32-fdcan
 
 config CAN_STM32FD
-	bool
-	default y
+	bool "STM32 FDCAN driver"
+	default $(dt_compat_enabled,$(DT_COMPAT_STM32_FDCAN))
+	select CAN_MCAN
+	select USE_STM32_LL_RCC
+
+if CAN_STM32FD
 
 config CAN_MAX_STD_ID_FILTER
 	int "Maximum number of std ID filters"
@@ -21,15 +29,14 @@ config CAN_MAX_EXT_ID_FILTER
 	  Defines the maximum number of filters with extended ID (29-bit)
 	  that can be attached.
 
-config CAN_CKDIV
-	int "CKDIV register value"
-	range 0 15
-	default 0
+config CAN_STM32_CLOCK_DIVISOR
+	int "CAN clock divisor"
+	range 1 30
+	default 1
 	help
-	  This value is written to the CKDIV register.
-	  The APB clock is divided according to this value before it is feed to
-	  CAN core. Note that the the divider affects all CAN controllers.
-	  The values of the register are multiplied by two and zero corresponds
-	  to one. The value six, for example results in a clock divided by 12.
+	  The APB clock is divided by this value (stored in CKDIV register)
+	  before it is fed to the CAN core.
+	  Note that the the divisor affects all CAN controllers.
+	  Allowed values: 1 or 2 * n, where n <= 15.
 
-endif #CAN_MCAN
+endif #CAN_STM32FD

drivers/can/can_mcan.c

@@ -86,6 +86,8 @@ void can_mcan_configure_timing(struct can_mcan_reg  *can,
 				timing->phase_seg2 > 0);
 		__ASSERT_NO_MSG(timing->prescaler <= 0x200 &&
 				timing->prescaler > 0);
+		__ASSERT_NO_MSG(timing->sjw <= 0x80 && timing->sjw > 0);
+
 		can->nbtp = (((uint32_t)timing->phase_seg1 - 1UL) & 0xFF) <<
 				CAN_MCAN_NBTP_NTSEG1_POS |
 			    (((uint32_t)timing->phase_seg2 - 1UL) & 0x7F) <<
@@ -105,6 +107,8 @@ void can_mcan_configure_timing(struct can_mcan_reg  *can,
 				timing_data->phase_seg2 > 0);
 		__ASSERT_NO_MSG(timing_data->prescaler <= 20 &&
 				timing_data->prescaler > 0);
+		__ASSERT_NO_MSG(timing_data->sjw <= 0x80 &&
+				timing_data->sjw > 0);
 
 		can->dbtp = (((uint32_t)timing_data->phase_seg1 - 1UL) & 0x1F) <<
 				CAN_MCAN_DBTP_DTSEG1_POS |
@@ -247,12 +251,12 @@ int can_mcan_init(const struct device *dev, const struct can_mcan_config *cfg,
 	can->txefc = ((uint32_t)msg_ram->tx_event_fifo & CAN_MCAN_TXEFC_EFSA_MSK) |
 		     (ARRAY_SIZE(msg_ram->tx_event_fifo) <<
 		     CAN_MCAN_TXEFC_EFS_POS);
-	can->txbc = ((uint32_t)msg_ram->tx_fifo & CAN_MCAN_TXBC_TBSA) |
-		    (ARRAY_SIZE(msg_ram->tx_fifo) << CAN_MCAN_TXBC_TFQS_POS);
-	if (sizeof(msg_ram->tx_fifo[0].data) <= 24) {
-		can->txesc = (sizeof(msg_ram->tx_fifo[0].data) - 8) / 4;
+	can->txbc = ((uint32_t)msg_ram->tx_buffer & CAN_MCAN_TXBC_TBSA) |
+		    (ARRAY_SIZE(msg_ram->tx_buffer) << CAN_MCAN_TXBC_TFQS_POS);
+	if (sizeof(msg_ram->tx_buffer[0].data) <= 24) {
+		can->txesc = (sizeof(msg_ram->tx_buffer[0].data) - 8) / 4;
 	} else {
-		can->txesc = (sizeof(msg_ram->tx_fifo[0].data) - 32) / 16 + 5;
+		can->txesc = (sizeof(msg_ram->tx_buffer[0].data) - 32) / 16 + 5;
 	}
 
 	if (sizeof(msg_ram->rx_fifo0[0].data) <= 24) {
@@ -612,7 +616,7 @@ int can_mcan_send(const struct can_mcan_config *cfg,
 {
 	struct can_mcan_reg  *can = cfg->can;
 	size_t data_length = can_dlc_to_bytes(frame->dlc);
-	struct can_mcan_tx_fifo_hdr tx_hdr = {
+	struct can_mcan_tx_buffer_hdr tx_hdr = {
 		.rtr = frame->rtr  == CAN_REMOTEREQUEST,
 		.xtd = frame->id_type == CAN_EXTENDED_IDENTIFIER,
 		.esi = 0,
@@ -675,10 +679,10 @@ int can_mcan_send(const struct can_mcan_config *cfg,
 		tx_hdr.ext_id = frame->id;
 	}
 
-	msg_ram->tx_fifo[put_idx].hdr = tx_hdr;
+	msg_ram->tx_buffer[put_idx].hdr = tx_hdr;
 
 	for (src = frame->data_32,
-		dst = msg_ram->tx_fifo[put_idx].data_32,
+		dst = msg_ram->tx_buffer[put_idx].data_32,
 		end = dst + CAN_DIV_CEIL(data_length, sizeof(uint32_t));
 		dst < end;
 		src++, dst++) {

drivers/can/can_mcan.h

@@ -30,7 +30,7 @@ struct can_mcan_rx_fifo_hdr {
 	union {
 		struct {
 			volatile uint32_t ext_id : 29; /* Extended Identifier */
-			volatile uint32_t rtr    :  1; /* Retmote Transmission Request*/
+			volatile uint32_t rtr    :  1; /* Remote Transmission Request*/
 			volatile uint32_t xtd    :  1; /* Extended identifier */
 			volatile uint32_t esi    :  1; /* Error state indicator */
 		};
@@ -63,7 +63,7 @@ struct can_mcan_mm {
 	volatile uint8_t cnt : 3;
 } __packed;
 
-struct can_mcan_tx_fifo_hdr {
+struct can_mcan_tx_buffer_hdr {
 	union {
 		struct {
 			volatile uint32_t ext_id : 29; /* Identifier */
@@ -86,8 +86,8 @@ struct can_mcan_tx_fifo_hdr {
 	struct can_mcan_mm mm; /* Message marker */
 } __packed;
 
-struct can_mcan_tx_fifo {
-	struct can_mcan_tx_fifo_hdr hdr;
+struct can_mcan_tx_buffer {
+	struct can_mcan_tx_buffer_hdr hdr;
 	union {
 		volatile uint8_t  data[64];
 		volatile uint32_t data_32[16];
@@ -152,7 +152,7 @@ struct can_mcan_msg_sram {
 	volatile struct can_mcan_rx_fifo rx_fifo1[NUM_RX_FIFO1_ELEMENTS];
 	volatile struct can_mcan_rx_fifo rx_buffer[NUM_RX_BUF_ELEMENTS];
 	volatile struct can_mcan_tx_event_fifo tx_event_fifo[NUM_TX_BUF_ELEMENTS];
-	volatile struct can_mcan_tx_fifo tx_fifo[NUM_TX_BUF_ELEMENTS];
+	volatile struct can_mcan_tx_buffer tx_buffer[NUM_TX_BUF_ELEMENTS];
 } __packed;
 
 struct can_mcan_data {