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pdgendtdanieldegrasse
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arch: common: nocache.ld: One nocache MPU region
Combine the load and noload cache regions for a single MPU aligned block. This is required to have an MPU region with a size that is a power of 2. Signed-off-by: Pieter De Gendt <[email protected]> (cherry picked from commit 8f79086)
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arch/common/nocache.ld

Lines changed: 2 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@ SECTION_DATA_PROLOGUE(_NOCACHE_SECTION_NAME,(NOLOAD),)
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#if defined(CONFIG_MMU)
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MMU_ALIGN;
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#else
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MPU_ALIGN(_nocache_noload_ram_size);
17+
MPU_ALIGN(_nocache_ram_size);
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#endif
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_nocache_ram_start = .;
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_nocache_noload_ram_start = .;
@@ -23,31 +23,21 @@ SECTION_DATA_PROLOGUE(_NOCACHE_SECTION_NAME,(NOLOAD),)
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#include <snippets-nocache-section.ld>
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26-
#if defined(CONFIG_MMU)
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MMU_ALIGN;
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#else
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MPU_ALIGN(_nocache_noload_ram_size);
30-
#endif
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_nocache_noload_ram_end = .;
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
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_nocache_noload_ram_size = _nocache_noload_ram_end - _nocache_noload_ram_start;
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/* Non-cached loadable region of RAM and ROM */
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SECTION_DATA_PROLOGUE(_NOCACHE_LOAD_SECTION_NAME,,)
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{
38-
#if defined(CONFIG_MMU)
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MMU_ALIGN;
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#else
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MPU_ALIGN(_nocache_load_ram_size);
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#endif
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_nocache_load_ram_start = .;
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*(.nocache_load)
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*(".nocache_load.*")
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#if defined(CONFIG_MMU)
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MMU_ALIGN;
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#else
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MPU_ALIGN(_nocache_load_ram_size);
40+
MPU_ALIGN(_nocache_ram_size);
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#endif
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_nocache_load_ram_end = .;
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_nocache_ram_end = .;

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