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Phuc Phamnhutnguyenkc
Phuc Pham
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nhutnguyenkc
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dts: renesas: Add I2C support for Renesas RZ/A3UL, T2M, N2L, V2L
Add I2C nodes to Renesas RZ/A3UL, T2M, N2L, V2L Signed-off-by: Phuc Pham <[email protected]> Signed-off-by: Nhut Nguyen <[email protected]>
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‎dts/arm/renesas/rz/rzn/r9a07g084.dtsi

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66
#include <mem.h>
77
#include <arm/armv8-r.dtsi>
88
#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
9+
#include <dt-bindings/i2c/i2c.h>
910

1011
/ {
1112
#address-cells = <1>;
@@ -588,5 +589,50 @@
588589
status = "disabled";
589590
};
590591
};
592+
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i2c0: i2c@80043000 {
594+
compatible = "renesas,rz-iic";
595+
channel = <0>;
596+
clock-frequency = <I2C_BITRATE_STANDARD>;
597+
#address-cells = <1>;
598+
#size-cells = <0>;
599+
reg = <0x80043000 0x400>;
600+
interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
601+
<GIC_SPI 309 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
602+
<GIC_SPI 310 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
603+
<GIC_SPI 311 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
604+
interrupt-names = "eri", "rxi", "txi", "tei";
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status = "disabled";
606+
};
607+
608+
i2c1: i2c@80043400 {
609+
compatible = "renesas,rz-iic";
610+
channel = <1>;
611+
clock-frequency = <I2C_BITRATE_STANDARD>;
612+
#address-cells = <1>;
613+
#size-cells = <0>;
614+
reg = <0x80043400 0x400>;
615+
interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
616+
<GIC_SPI 313 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
617+
<GIC_SPI 314 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
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<GIC_SPI 315 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
619+
interrupt-names = "eri", "rxi", "txi", "tei";
620+
status = "disabled";
621+
};
622+
623+
i2c2: i2c@81008000 {
624+
compatible = "renesas,rz-iic";
625+
channel = <2>;
626+
clock-frequency = <I2C_BITRATE_STANDARD>;
627+
#address-cells = <1>;
628+
#size-cells = <0>;
629+
reg = <0x81008000 0x400>;
630+
interrupts = <GIC_SPI 439 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
631+
<GIC_SPI 440 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
632+
<GIC_SPI 441 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
633+
<GIC_SPI 442 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
634+
interrupt-names = "eri", "rxi", "txi", "tei";
635+
status = "disabled";
636+
};
591637
};
592638
};

‎dts/arm/renesas/rz/rzt/r9a07g075.dtsi

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@
88
#include <mem.h>
99
#include <arm/armv8-r.dtsi>
1010
#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
11+
#include <dt-bindings/i2c/i2c.h>
1112

1213
/ {
1314
compatible = "renesas,r9a07g075";
@@ -586,5 +587,50 @@
586587
status = "disabled";
587588
};
588589
};
590+
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i2c0: i2c@80043000 {
592+
compatible = "renesas,rz-iic";
593+
channel = <0>;
594+
clock-frequency = <I2C_BITRATE_STANDARD>;
595+
#address-cells = <1>;
596+
#size-cells = <0>;
597+
reg = <0x80043000 0x400>;
598+
interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
599+
<GIC_SPI 309 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
600+
<GIC_SPI 310 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
601+
<GIC_SPI 311 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
602+
interrupt-names = "eri", "rxi", "txi", "tei";
603+
status = "disabled";
604+
};
605+
606+
i2c1: i2c@80043400 {
607+
compatible = "renesas,rz-iic";
608+
channel = <1>;
609+
clock-frequency = <I2C_BITRATE_STANDARD>;
610+
#address-cells = <1>;
611+
#size-cells = <0>;
612+
reg = <0x80043400 0x400>;
613+
interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
614+
<GIC_SPI 313 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
615+
<GIC_SPI 314 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
616+
<GIC_SPI 315 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
617+
interrupt-names = "eri", "rxi", "txi", "tei";
618+
status = "disabled";
619+
};
620+
621+
i2c2: i2c@81008000 {
622+
compatible = "renesas,rz-iic";
623+
channel = <2>;
624+
clock-frequency = <I2C_BITRATE_STANDARD>;
625+
#address-cells = <1>;
626+
#size-cells = <0>;
627+
reg = <0x81008000 0x400>;
628+
interrupts = <GIC_SPI 439 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
629+
<GIC_SPI 440 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
630+
<GIC_SPI 441 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
631+
<GIC_SPI 442 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
632+
interrupt-names = "eri", "rxi", "txi", "tei";
633+
status = "disabled";
634+
};
589635
};
590636
};

‎dts/arm/renesas/rz/rzv/r9a07g054.dtsi

Lines changed: 53 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66
#include <arm/armv8-m.dtsi>
77
#include <mem.h>
88
#include <freq.h>
9+
#include <dt-bindings/i2c/i2c.h>
910

1011
/ {
1112
compatible = "renesas,r9a07g054";
@@ -539,6 +540,58 @@
539540
interrupt-names = "eri", "bri", "rxi", "txi", "tei";
540541
status = "disabled";
541542
};
543+
544+
i2c0: i2c@40058000 {
545+
compatible = "renesas,rz-riic";
546+
channel = <0>;
547+
clock-frequency = <I2C_BITRATE_STANDARD>;
548+
#address-cells = <1>;
549+
#size-cells = <0>;
550+
reg = <0x40058000 DT_SIZE_K(1)>;
551+
interrupts = <348 1>, <349 1>, <350 1>, <351 1>,
552+
<352 1>, <353 1>, <354 1>, <355 1>;
553+
interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";
554+
status = "disabled";
555+
};
556+
557+
i2c1: i2c@40058400 {
558+
compatible = "renesas,rz-riic";
559+
channel = <1>;
560+
clock-frequency = <I2C_BITRATE_STANDARD>;
561+
#address-cells = <1>;
562+
#size-cells = <0>;
563+
reg = <0x40058400 DT_SIZE_K(1)>;
564+
interrupts = <356 1>, <357 1>, <358 1>, <359 1>,
565+
<360 1>, <361 1>, <362 1>, <363 1>;
566+
interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";
567+
status = "disabled";
568+
};
569+
570+
i2c2: i2c@40058800 {
571+
compatible = "renesas,rz-riic";
572+
channel = <2>;
573+
clock-frequency = <I2C_BITRATE_STANDARD>;
574+
#address-cells = <1>;
575+
#size-cells = <0>;
576+
reg = <0x40058800 DT_SIZE_K(1)>;
577+
interrupts = <364 1>, <365 1>, <366 1>, <367 1>,
578+
<368 1>, <369 1>, <370 1>, <371 1>;
579+
interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";
580+
status = "disabled";
581+
};
582+
583+
i2c3: i2c@40058c00 {
584+
compatible = "renesas,rz-riic";
585+
channel = <3>;
586+
clock-frequency = <I2C_BITRATE_STANDARD>;
587+
#address-cells = <1>;
588+
#size-cells = <0>;
589+
reg = <0x40058c00 DT_SIZE_K(1)>;
590+
interrupts = <372 1>, <373 1>, <374 1>, <375 1>,
591+
<376 1>, <377 1>, <378 1>, <379 1>;
592+
interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";
593+
status = "disabled";
594+
};
542595
};
543596
};
544597

‎dts/arm64/renesas/rz/rza/r9a07g063.dtsi

Lines changed: 77 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@
99
#include <arm64/armv8-a.dtsi>
1010
#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
1111
#include <zephyr/dt-bindings/gpio/gpio.h>
12+
#include <dt-bindings/i2c/i2c.h>
1213

1314
/ {
1415
compatible = "renesas,r9a07g063";
@@ -329,5 +330,81 @@
329330
interrupt-names = "eri", "bri", "rxi", "txi", "tei";
330331
status = "disabled";
331332
};
333+
334+
i2c0: i2c@10058000 {
335+
compatible = "renesas,rz-riic";
336+
channel = <0>;
337+
clock-frequency = <I2C_BITRATE_STANDARD>;
338+
#address-cells = <1>;
339+
#size-cells = <0>;
340+
reg = <0x10058000 DT_SIZE_K(1)>;
341+
interrupts = <GIC_SPI 348 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
342+
<GIC_SPI 349 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
343+
<GIC_SPI 350 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
344+
<GIC_SPI 351 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
345+
<GIC_SPI 352 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
346+
<GIC_SPI 353 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
347+
<GIC_SPI 354 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
348+
<GIC_SPI 355 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
349+
interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";
350+
status = "disabled";
351+
};
352+
353+
i2c1: i2c@10058400 {
354+
compatible = "renesas,rz-riic";
355+
channel = <1>;
356+
clock-frequency = <I2C_BITRATE_STANDARD>;
357+
#address-cells = <1>;
358+
#size-cells = <0>;
359+
reg = <0x10058400 DT_SIZE_K(1)>;
360+
interrupts = <GIC_SPI 356 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
361+
<GIC_SPI 357 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
362+
<GIC_SPI 358 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
363+
<GIC_SPI 359 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
364+
<GIC_SPI 360 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
365+
<GIC_SPI 361 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
366+
<GIC_SPI 362 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
367+
<GIC_SPI 363 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
368+
interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";
369+
status = "disabled";
370+
};
371+
372+
i2c2: i2c@10058800 {
373+
compatible = "renesas,rz-riic";
374+
channel = <2>;
375+
clock-frequency = <I2C_BITRATE_STANDARD>;
376+
#address-cells = <1>;
377+
#size-cells = <0>;
378+
reg = <0x10058800 DT_SIZE_K(1)>;
379+
interrupts = <GIC_SPI 364 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
380+
<GIC_SPI 365 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
381+
<GIC_SPI 366 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
382+
<GIC_SPI 367 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
383+
<GIC_SPI 368 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
384+
<GIC_SPI 369 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
385+
<GIC_SPI 370 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
386+
<GIC_SPI 371 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
387+
interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";
388+
status = "disabled";
389+
};
390+
391+
i2c3: i2c@10058c00 {
392+
compatible = "renesas,rz-riic";
393+
channel = <3>;
394+
clock-frequency = <I2C_BITRATE_STANDARD>;
395+
#address-cells = <1>;
396+
#size-cells = <0>;
397+
reg = <0x10058c00 DT_SIZE_K(1)>;
398+
interrupts = <GIC_SPI 372 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
399+
<GIC_SPI 373 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
400+
<GIC_SPI 374 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
401+
<GIC_SPI 375 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
402+
<GIC_SPI 376 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
403+
<GIC_SPI 377 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
404+
<GIC_SPI 378 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
405+
<GIC_SPI 379 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
406+
interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";
407+
status = "disabled";
408+
};
332409
};
333410
};

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