drivers: clock: stm32H5 clock control of the PLL in MemoryMapped mode

Do not disable the pll clock if it source the xspi and if the external
flash is executing in Place. After mcuboot reset, the code is executed
on the external flash, through the xspi.
The CONFIG_STM32_APP_IN_EXT_FLASH tis set and will avoid re-config
of the pll which is sourcing the xspi peripheral. When excuting in Place
on this external NOR It must not disable its own clock source (PLL).

Signed-off-by: Francois Ramu <[email protected]>

Author: FRASTM

drivers/clock_control/clock_stm32_ll_h5.c

@@ -435,7 +435,19 @@ static int set_up_plls(void)
 #endif
 
 #if defined(STM32_PLL_ENABLED)
+
+#if defined(CONFIG_STM32_APP_IN_EXT_FLASH)
+	/*
+	 * Don't disable PLL1 during application initialization
+	 * that runs on the external octospi flash (in memmap mode)
+	 * when (Q/O)SPI uses PLL1 as its clock source.
+	 */
+	if (LL_RCC_GetOCTOSPIClockSource(LL_RCC_OCTOSPI_CLKSOURCE) == LL_RCC_OSPI_CLKSOURCE_PLL1Q) {
+		goto setup_pll2;
+	}
+#endif /* CONFIG_STM32_APP_IN_EXT_FLASH */
 	/*
+	 * Case of chain-loaded applications:
 	 * Switch to HSI and disable the PLL before configuration.
 	 * (Switching to HSI makes sure we have a SYSCLK source in
 	 * case we're currently running from the PLL we're about to
@@ -501,12 +513,30 @@ static int set_up_plls(void)
 	LL_RCC_PLL1_Enable();
 	while (LL_RCC_PLL1_IsReady() != 1U) {
 	}
+
+	goto setup_pll2;
 #else
 	/* Init PLL source to None */
 	LL_RCC_PLL1_SetSource(LL_RCC_PLL1SOURCE_NONE);
+
+	goto setup_pll2;
 #endif /* STM32_PLL_ENABLED */
 
+setup_pll2:
 #if defined(STM32_PLL2_ENABLED)
+
+#if defined(CONFIG_STM32_APP_IN_EXT_FLASH)
+	/*
+	 * Don't disable PLL2 during application initialization
+	 * that runs on the external octospi flash (in memmap mode)
+	 * when (Q/O)SPI uses PLL2 as its clock source.
+	 */
+	if (LL_RCC_GetOCTOSPIClockSource(LL_RCC_OCTOSPI_CLKSOURCE) == LL_RCC_OSPI_CLKSOURCE_PLL2R) {
+		goto setup_pll3;
+	}
+#endif /* CONFIG_STM32_APP_IN_EXT_FLASH */
+	LL_RCC_PLL2_Disable();
+
 	/* Configure PLL2 source */
 	if (IS_ENABLED(STM32_PLL2_SRC_HSE)) {
 		LL_RCC_PLL2_SetSource(LL_RCC_PLL2SOURCE_HSE);
@@ -554,11 +584,16 @@ static int set_up_plls(void)
 	LL_RCC_PLL2_Enable();
 	while (LL_RCC_PLL2_IsReady() != 1U) {
 	}
+
+	goto setup_pll3;
 #else
 	/* Init PLL2 source to None */
 	LL_RCC_PLL2_SetSource(LL_RCC_PLL2SOURCE_NONE);
+
+	goto setup_pll3;
 #endif /* STM32_PLL2_ENABLED */
 
+setup_pll3:
 #if defined(RCC_CR_PLL3ON)
 #if defined(STM32_PLL3_ENABLED)
 	/* Configure PLL3 source */