@@ -18,6 +18,14 @@ LOG_MODULE_REGISTER(clock_control);
1818static int mcux_lpc_syscon_clock_control_on (const struct device * dev ,
1919 clock_control_subsys_t sub_system )
2020{
21+ #if defined(CONFIG_CAN_MCUX_MCAN )
22+ uint32_t clock_name = (uint32_t )sub_system ;
23+
24+ if (clock_name == MCUX_MCAN_CLK ) {
25+ CLOCK_EnableClock (kCLOCK_Mcan );
26+ }
27+ #endif /* defined(CONFIG_CAN_MCUX_MCAN) */
28+
2129 return 0 ;
2230}
2331
@@ -35,11 +43,15 @@ static int mcux_lpc_syscon_clock_control_get_subsys_rate(
3543#if defined(CONFIG_I2C_MCUX_FLEXCOMM ) || \
3644 defined(CONFIG_SPI_MCUX_FLEXCOMM ) || \
3745 defined(CONFIG_UART_MCUX_FLEXCOMM ) || \
38- defined(CONFIG_COUNTER_MCUX_CTIMER )
46+ defined(CONFIG_COUNTER_MCUX_CTIMER ) || \
47+ defined(CONFIG_CAN_MCUX_MCAN )
3948
4049 uint32_t clock_name = (uint32_t ) sub_system ;
4150
4251 switch (clock_name ) {
52+ #if defined(CONFIG_I2C_MCUX_FLEXCOMM ) || \
53+ defined(CONFIG_SPI_MCUX_FLEXCOMM ) || \
54+ defined(CONFIG_UART_MCUX_FLEXCOMM )
4355 case MCUX_FLEXCOMM0_CLK :
4456 * rate = CLOCK_GetFlexCommClkFreq (0 );
4557 break ;
@@ -84,6 +96,11 @@ static int mcux_lpc_syscon_clock_control_get_subsys_rate(
8496 * rate = CLOCK_GetSdioClkFreq (1 );
8597 break ;
8698#endif
99+ #if defined(CONFIG_CAN_MCUX_MCAN )
100+ case MCUX_MCAN_CLK :
101+ * rate = CLOCK_GetMCanClkFreq ();
102+ break ;
103+ #endif /* defined(CONFIG_CAN_MCUX_MCAN) */
87104#if defined(CONFIG_COUNTER_MCUX_CTIMER )
88105 case (MCUX_CTIMER0_CLK + MCUX_CTIMER_CLK_OFFSET ):
89106 * rate = CLOCK_GetCTimerClkFreq (0 );
@@ -102,6 +119,7 @@ static int mcux_lpc_syscon_clock_control_get_subsys_rate(
102119 break ;
103120#endif
104121 }
122+ #endif
105123#endif
106124
107125 return 0 ;
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