drivers: gpio: move non-standard dts flags to be soc specific

Reserve the upper 8 bits of gpio_dt_flags_t for SoC specific flags and
move the non-standard, hardware-specific GPIO devicetree flags (IO
voltage level, drive strength, debounce filter) from the generic
dt-bindings/gpio/gpio.h header to SoC specific dt-bindings headers.

Some of the SoC specific dt-bindings flags take up more bits than
necessary in order to retain backwards compatibility with the deprecated
GPIO flags. The width of these fields can be reduced/optimized once the
deprecated flags are removed.

Remove hardcoded use of GPIO_INT_DEBOUNCE in GPIO client drivers. This
flag can now be set in the devicetree for boards/SoCs with debounce
filter support. The SoC specific debounce flags have had the _INT part
of their name removed since these flag must be passed to
gpio_pin_configure(), not gpio_pin_interrupt_configure().

Signed-off-by: Henrik Brix Andersen <[email protected]>

Author: henrikbrixandersen

drivers/gpio/gpio_andes_atcgpio100.c

@@ -14,6 +14,7 @@
 #include <device.h>
 #include <soc.h>
 #include <drivers/gpio.h>
+#include <dt-bindings/gpio/andestech-atcgpio100.h>
 #include <sys/util.h>
 #include <sys/sys_io.h>
 
@@ -140,7 +141,7 @@ static int gpio_atcgpio100_config(const struct device *port,
 		key = k_spin_lock(&data->lock);
 
 		/* Set de-bounce */
-		if (flags & GPIO_INT_DEBOUNCE) {
+		if (flags & ATCGPIO100_GPIO_DEBOUNCE) {
 			/* Default settings: Filter out pulses which are
 			 *  less than 4 de-bounce clock period
 			 */

drivers/gpio/gpio_b91.c

@@ -324,11 +324,6 @@ static int gpio_b91_pin_configure(const struct device *dev,
 		return -ENOTSUP;
 	}
 
-	/* Strengths not implemented */
-	if ((flags & GPIO_DS_ALT) != 0) {
-		return -ENOTSUP;
-	}
-
 	/* Set GPIO init state if defined to avoid glitches */
 	if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0) {
 		gpio->output |= BIT(pin);

drivers/gpio/gpio_cc13xx_cc26xx.c

@@ -11,6 +11,7 @@
 #include <device.h>
 #include <errno.h>
 #include <drivers/gpio.h>
+#include <dt-bindings/gpio/ti-cc13xx-cc26xx-gpio.h>
 
 #include <driverlib/gpio.h>
 #include <driverlib/interrupt.h>
@@ -72,28 +73,21 @@ static int gpio_cc13xx_cc26xx_config(const struct device *port,
 
 	config |= IOC_SLEW_DISABLE | IOC_NO_WAKE_UP;
 
-	config |= (flags & GPIO_INT_DEBOUNCE) ? IOC_HYST_ENABLE :
-							IOC_HYST_DISABLE;
-
-	/*
-	 * The GPIO_DS_ALT_HIGH and GPIO_DS_ALT_LOW flags are for setting
-	 * the highest drive strength for a GPIO in the output HIGH and
-	 * output LOW states, respectively. Since only 1 drive strength
-	 * setting is available for a GPIO (irrespective of output state),
-	 * require both flags to be set for highest drive strength, default
-	 * to low/auto drive strength.
-	 * Not all GPIO support 8ma, but setting that bit will use the highest
-	 * supported drive strength.
-	 */
-	switch (flags & (GPIO_DS_ALT_HIGH | GPIO_DS_ALT_LOW)) {
-	case 0:
+	config |= (flags & CC13XX_CC26XX_GPIO_DEBOUNCE) ?
+		IOC_HYST_ENABLE : IOC_HYST_DISABLE;
+
+	switch (flags & CC13XX_CC26XX_GPIO_DS_MASK) {
+	case CC13XX_CC26XX_GPIO_DS_DFLT:
 		config |= IOC_CURRENT_2MA | IOC_STRENGTH_AUTO;
 		break;
-	case (GPIO_DS_ALT_HIGH | GPIO_DS_ALT_LOW):
+	case CC13XX_CC26XX_GPIO_DS_ALT:
+		/*
+		 * Not all GPIO support 8ma, but setting that bit will use the
+		 * highest supported drive strength.
+		 */
 		config |= IOC_CURRENT_8MA | IOC_STRENGTH_MAX;
 		break;
-	case GPIO_DS_ALT_HIGH:
-	case GPIO_DS_ALT_LOW:
+	default:
 		return -ENOTSUP;
 	}
 

drivers/gpio/gpio_cy8c95xx.c

@@ -105,11 +105,6 @@ static int cy8c95xx_config(const struct device *dev,
 		return -EWOULDBLOCK;
 	}
 
-	/* Strengths not implemented */
-	if ((flags & GPIO_DS_ALT) != 0) {
-		return -ENOTSUP;
-	}
-
 	/* Open-drain not implemented */
 	if ((flags & GPIO_SINGLE_ENDED) != 0U) {
 		return -ENOTSUP;

drivers/gpio/gpio_dw.c

@@ -10,6 +10,7 @@
 
 #include <kernel.h>
 #include <drivers/gpio.h>
+#include <dt-bindings/gpio/snps-designware-gpio.h>
 #include "gpio_dw.h"
 #include "gpio_utils.h"
 
@@ -301,7 +302,7 @@ static inline void dw_pin_config(const struct device *port,
 	 * interrupts according to datasheet.
 	 */
 	if (dw_interrupt_support(config) && (dir_port == SWPORTA_DDR)) {
-		need_debounce = (flags & GPIO_INT_DEBOUNCE);
+		need_debounce = (flags & DW_GPIO_DEBOUNCE);
 		dw_set_bit(base_addr, PORTA_DEBOUNCE, pin, need_debounce);
 	}
 }

drivers/gpio/gpio_esp32.c

@@ -19,6 +19,7 @@
 #include <errno.h>
 #include <device.h>
 #include <drivers/gpio.h>
+#include <dt-bindings/gpio/espressif-esp32-gpio.h>
 #ifdef CONFIG_SOC_ESP32C3
 #include <drivers/interrupt_controller/intc_esp32c3.h>
 #else
@@ -151,8 +152,8 @@ static int gpio_esp32_config(const struct device *dev,
 		 * to either low or high states. Alternative drive strength is weak-only,
 		 * while any other intermediary combination is considered invalid.
 		 */
-		switch (flags & GPIO_DS_MASK) {
-		case GPIO_DS_DFLT:
+		switch (flags & ESP32_GPIO_DS_MASK) {
+		case ESP32_GPIO_DS_DFLT:
 			if (!rtc_gpio_is_valid_gpio(io_pin) || SOC_GPIO_SUPPORT_RTC_INDEPENDENT) {
 				gpio_ll_set_drive_capability(cfg->gpio_base,
 						io_pin,
@@ -164,7 +165,7 @@ static int gpio_esp32_config(const struct device *dev,
 #endif
 			}
 			break;
-		case GPIO_DS_ALT:
+		case ESP32_GPIO_DS_ALT:
 			if (!rtc_gpio_is_valid_gpio(io_pin) || SOC_GPIO_SUPPORT_RTC_INDEPENDENT) {
 				gpio_ll_set_drive_capability(cfg->gpio_base,
 						io_pin,

drivers/gpio/gpio_fxl6408.c

@@ -26,7 +26,7 @@ LOG_MODULE_REGISTER(fxl6408, CONFIG_FXL6408_LOG_LEVEL);
 
 #define SUPPORTED_FLAGS (GPIO_INPUT | GPIO_OUTPUT | GPIO_OUTPUT_INIT_LOW |\
 			GPIO_OUTPUT_INIT_HIGH | GPIO_PULL_DOWN | GPIO_PULL_UP |\
-			GPIO_ACTIVE_HIGH | GPIO_ACTIVE_LOW | GPIO_INT_DEBOUNCE)
+			GPIO_ACTIVE_HIGH | GPIO_ACTIVE_LOW)
 
 /** Configuration data*/
 struct gpio_fxl6408_config {

drivers/gpio/gpio_ite_it8xxx2.c

@@ -7,6 +7,7 @@
 #include <errno.h>
 #include <device.h>
 #include <drivers/gpio.h>
+#include <dt-bindings/gpio/ite-it8xxx2-gpio.h>
 #include <dt-bindings/interrupt-controller/ite-intc.h>
 #include <zephyr/types.h>
 #include <sys/util.h>
@@ -379,14 +380,14 @@ static int gpio_ite_configure(const struct device *dev,
 			gpio_1p8v[gpio_config->index][pin].offset);
 	mask_1p8v = gpio_1p8v[gpio_config->index][pin].mask_1p8v;
 	if (reg_1p8v != &IT8XXX2_GPIO_GCRX(0)) {
-		gpio_flags_t volt = flags & GPIO_VOLTAGE_MASK;
+		gpio_flags_t volt = flags & IT8XXX2_GPIO_VOLTAGE_MASK;
 
-		if (volt == GPIO_VOLTAGE_1P8) {
+		if (volt == IT8XXX2_GPIO_VOLTAGE_1P8) {
 			__ASSERT(!(flags & GPIO_PULL_UP),
 			"Don't enable internal pullup if 1.8V voltage is used");
 			*reg_1p8v |= mask_1p8v;
-		} else if (volt == GPIO_VOLTAGE_3P3 ||
-			   volt == GPIO_VOLTAGE_DEFAULT) {
+		} else if (volt == IT8XXX2_GPIO_VOLTAGE_3P3 ||
+			   volt == IT8XXX2_GPIO_VOLTAGE_DEFAULT) {
 			*reg_1p8v &= ~mask_1p8v;
 		} else {
 			return -EINVAL;

drivers/gpio/gpio_mcux.c

@@ -10,6 +10,7 @@
 #include <errno.h>
 #include <device.h>
 #include <drivers/gpio.h>
+#include <dt-bindings/gpio/nxp-kinetis-gpio.h>
 #include <soc.h>
 #include <fsl_common.h>
 #include <fsl_port.h>
@@ -98,12 +99,12 @@ static int gpio_mcux_configure(const struct device *dev,
 
 #if defined(FSL_FEATURE_PORT_HAS_DRIVE_STRENGTH) && FSL_FEATURE_PORT_HAS_DRIVE_STRENGTH
 	/* Determine the drive strength */
-	switch (flags & GPIO_DS_MASK) {
-	case GPIO_DS_DFLT:
+	switch (flags & KINETIS_GPIO_DS_MASK) {
+	case KINETIS_GPIO_DS_DFLT:
 		/* Default is low drive strength */
 		mask |= PORT_PCR_DSE_MASK;
 		break;
-	case GPIO_DS_ALT:
+	case KINETIS_GPIO_DS_ALT:
 		/* Alternate is high drive strength */
 		pcr |= PORT_PCR_DSE_MASK;
 		break;

drivers/gpio/gpio_nrfx.c

@@ -8,6 +8,7 @@
 #include <nrfx_gpiote.h>
 #include <string.h>
 #include <drivers/gpio.h>
+#include <dt-bindings/gpio/nordic-nrf-gpio.h>
 #include "gpio_utils.h"
 
 struct gpio_nrfx_data {
@@ -38,32 +39,32 @@ static int get_drive(gpio_flags_t flags, nrf_gpio_pin_drive_t *drive)
 {
 	int err = 0;
 
-	switch (flags & (GPIO_DS_LOW_MASK | GPIO_DS_HIGH_MASK |
+	switch (flags & (NRF_GPIO_DS_LOW_MASK | NRF_GPIO_DS_HIGH_MASK |
 			 GPIO_OPEN_DRAIN)) {
-	case GPIO_DS_DFLT:
+	case NRF_GPIO_DS_DFLT:
 		*drive = NRF_GPIO_PIN_S0S1;
 		break;
-	case GPIO_DS_DFLT_LOW | GPIO_DS_ALT_HIGH:
+	case NRF_GPIO_DS_DFLT_LOW | NRF_GPIO_DS_ALT_HIGH:
 		*drive = NRF_GPIO_PIN_S0H1;
 		break;
-	case GPIO_DS_DFLT_LOW | GPIO_OPEN_DRAIN:
+	case NRF_GPIO_DS_DFLT_LOW | GPIO_OPEN_DRAIN:
 		*drive = NRF_GPIO_PIN_S0D1;
 		break;
 
-	case GPIO_DS_ALT_LOW | GPIO_DS_DFLT_HIGH:
+	case NRF_GPIO_DS_ALT_LOW | NRF_GPIO_DS_DFLT_HIGH:
 		*drive = NRF_GPIO_PIN_H0S1;
 		break;
-	case GPIO_DS_ALT:
+	case NRF_GPIO_DS_ALT:
 		*drive = NRF_GPIO_PIN_H0H1;
 		break;
-	case GPIO_DS_ALT_LOW | GPIO_OPEN_DRAIN:
+	case NRF_GPIO_DS_ALT_LOW | GPIO_OPEN_DRAIN:
 		*drive = NRF_GPIO_PIN_H0D1;
 		break;
 
-	case GPIO_DS_DFLT_HIGH | GPIO_OPEN_SOURCE:
+	case NRF_GPIO_DS_DFLT_HIGH | GPIO_OPEN_SOURCE:
 		*drive = NRF_GPIO_PIN_D0S1;
 		break;
-	case GPIO_DS_ALT_HIGH | GPIO_OPEN_SOURCE:
+	case NRF_GPIO_DS_ALT_HIGH | GPIO_OPEN_SOURCE:
 		*drive = NRF_GPIO_PIN_D0H1;
 		break;