Skip to content

Commit d40f544

Browse files
committed
boards: arm: sam4s_xplained: Enable SRAM on SMC bus
This commit enables the SRAM controller is66wv51216dbll connected to the SMC/EBI bus. Half of the memory is made available (512KB) on chip select 0, the other part is (512KB) on chip select 1. The SMC timings are taken from the Microchip studio example SMC_SRAM_EXAMPLE for the sam4s_xplained board. Signed-off-by: Pieter De Gendt <[email protected]>
1 parent 6ea2196 commit d40f544

File tree

5 files changed

+81
-0
lines changed

5 files changed

+81
-0
lines changed

boards/arm/sam4s_xplained/doc/index.rst

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,8 @@ features:
5555
+-----------+------------+-------------------------------------+
5656
| HWINFO | on-chip | Unique device serial number |
5757
+-----------+------------+-------------------------------------+
58+
| SMC | on-chip | memc (PSRAM) |
59+
+-----------+------------+-------------------------------------+
5860

5961
Other hardware features are not currently supported by Zephyr.
6062

boards/arm/sam4s_xplained/sam4s_xplained-pinctrl.dtsi

Lines changed: 35 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -41,4 +41,39 @@
4141
<PA22A_USART1_TXD>;
4242
};
4343
};
44+
smc_default: smc_default {
45+
group1 {
46+
pinmux = <PC18A_EBI_A0>,
47+
<PC19A_EBI_A1>,
48+
<PC20A_EBI_A2>,
49+
<PC21A_EBI_A3>,
50+
<PC22A_EBI_A4>,
51+
<PC23A_EBI_A5>,
52+
<PC24A_EBI_A6>,
53+
<PC25A_EBI_A7>,
54+
<PC26A_EBI_A8>,
55+
<PC27A_EBI_A9>,
56+
<PC28A_EBI_A10>,
57+
<PC29A_EBI_A11>,
58+
<PC30A_EBI_A12>,
59+
<PC31A_EBI_A13>,
60+
<PA18C_EBI_A14>,
61+
<PA19C_EBI_A15>,
62+
<PA20C_EBI_A16>,
63+
<PA0C_EBI_A17>,
64+
<PA1C_EBI_A18>,
65+
<PC0A_EBI_D0>,
66+
<PC1A_EBI_D1>,
67+
<PC2A_EBI_D2>,
68+
<PC3A_EBI_D3>,
69+
<PC4A_EBI_D4>,
70+
<PC5A_EBI_D5>,
71+
<PC6A_EBI_D6>,
72+
<PC7A_EBI_D7>,
73+
<PC14A_EBI_NCS0>,
74+
<PC15A_EBI_NCS1>,
75+
<PC11A_EBI_NRD>,
76+
<PC8A_EBI_NWE>;
77+
};
78+
};
4479
};

boards/arm/sam4s_xplained/sam4s_xplained.dts

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,20 @@
2828
zephyr,flash = &flash0;
2929
};
3030

31+
sram1: sram@60000000 {
32+
compatible = "zephyr,memory-region", "mmio-sram";
33+
device_type = "memory";
34+
reg = <0x60000000 DT_SIZE_K(512)>;
35+
zephyr,memory-region = "SRAM1";
36+
};
37+
38+
sram2: sram@61000000 {
39+
compatible = "zephyr,memory-region", "mmio-sram";
40+
device_type = "memory";
41+
reg = <0x61000000 DT_SIZE_K(512)>;
42+
zephyr,memory-region = "SRAM2";
43+
};
44+
3145
leds {
3246
compatible = "gpio-leds";
3347
yellow_led_1: led_1 {
@@ -175,3 +189,29 @@ xplained4_spi: &spi0 {
175189

176190
xplained4_serial: &uart1 {
177191
};
192+
193+
&smc {
194+
status = "okay";
195+
pinctrl-0 = <&smc_default>;
196+
pinctrl-names = "default";
197+
198+
is66wv51216dbll@0 {
199+
reg = <0>;
200+
201+
atmel,smc-write-mode = "nwe";
202+
atmel,smc-read-mode = "nrd";
203+
atmel,smc-setup-timing = <1 1 1 1>;
204+
atmel,smc-pulse-timing = <6 6 6 6>;
205+
atmel,smc-cycle-timing = <7 7>;
206+
};
207+
208+
is66wv51216dbll@1 {
209+
reg = <1>;
210+
211+
atmel,smc-write-mode = "nwe";
212+
atmel,smc-read-mode = "nrd";
213+
atmel,smc-setup-timing = <1 1 1 1>;
214+
atmel,smc-pulse-timing = <6 6 6 6>;
215+
atmel,smc-cycle-timing = <7 7>;
216+
};
217+
};

boards/arm/sam4s_xplained/sam4s_xplained.yaml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@ toolchain:
88
- xtools
99
supported:
1010
- gpio
11+
- memc
1112
- spi
1213
- watchdog
1314
- xplained_gpio

boards/arm/sam4s_xplained/sam4s_xplained_defconfig

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,5 +12,8 @@ CONFIG_SOC_ATMEL_SAM4S_EXT_MAINCK=y
1212
CONFIG_GPIO=y
1313
CONFIG_WDT_DISABLE_AT_BOOT=y
1414

15+
# Enable SMC SRAM
16+
CONFIG_MEMC=y
17+
1518
# Enable HW stack protection
1619
CONFIG_HW_STACK_PROTECTION=y

0 commit comments

Comments
 (0)