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drivers: added serial driver for MSPM0
added the Serial (uart) driver for MSPM0 family Signed-off-by: Jackson Farley <[email protected]>
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‎drivers/serial/CMakeLists.txt‎

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@@ -43,6 +43,7 @@ zephyr_library_sources_ifdef(CONFIG_UART_MCUX_LPSCI uart_mcux_lpsci.c)
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zephyr_library_sources_ifdef(CONFIG_UART_MCUX_LPUART uart_mcux_lpuart.c)
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zephyr_library_sources_ifdef(CONFIG_UART_MIV uart_miv.c)
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zephyr_library_sources_ifdef(CONFIG_UART_MSP432P4XX uart_msp432p4xx.c)
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zephyr_library_sources_ifdef(CONFIG_UART_MSPM0 uart_mspm0.c)
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zephyr_library_sources_ifdef(CONFIG_UART_NEORV32 uart_neorv32.c)
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zephyr_library_sources_ifdef(CONFIG_UART_NPCX uart_npcx.c)
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zephyr_library_sources_ifdef(CONFIG_UART_NRFX_UART uart_nrfx_uart.c)

‎drivers/serial/Kconfig‎

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@@ -183,6 +183,7 @@ rsource "Kconfig.mcux_lpsci"
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rsource "Kconfig.mcux_lpuart"
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rsource "Kconfig.miv"
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rsource "Kconfig.msp432p4xx"
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rsource "Kconfig.mspm0"
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rsource "Kconfig.native_posix"
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rsource "Kconfig.native_tty"
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rsource "Kconfig.neorv32"

‎drivers/serial/Kconfig.mspm0‎

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# SPDX-License-Identifier: Apache-2.0
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# Copyright (c) 2024 Texas Instruments
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config UART_MSPM0
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bool "MSPM0 UART driver"
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default y
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depends on DT_HAS_TI_MSPM0_UART_ENABLED
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select SERIAL_HAS_DRIVER
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select SERIAL_SUPPORT_INTERRUPT
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select PINCTRL
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help
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This option enables the TI MSPM0 UART driver.

‎drivers/serial/uart_mspm0.c‎

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/*
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* Copyright (c) 2024 Texas Instruments
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT ti_mspm0_uart
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/* Zephyr includes */
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#include <zephyr/kernel.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/drivers/uart.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/clock_control/mspm0_clock_control.h>
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#include <zephyr/irq.h>
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#include <soc.h>
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/* Driverlib includes */
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#include <ti/driverlib/dl_uart_main.h>
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struct uart_mspm0_config {
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UART_Regs *regs;
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uint32_t clock_frequency;
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uint32_t current_speed;
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const struct mspm0_clockSys *clock_subsys;
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const struct pinctrl_dev_config *pinctrl;
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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uart_irq_config_func_t irq_config_func;
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#endif
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};
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struct uart_mspm0_data {
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/* UART clock structure */
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DL_UART_Main_ClockConfig UART_ClockConfig;
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/* UART config structure */
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DL_UART_Main_Config UART_Config;
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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uint32_t interruptState; /* Masked Interrupt Status when called by irq_update */
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uart_irq_callback_user_data_t cb; /* Callback function pointer */
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void *cb_data; /* Callback function arg */
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void uart_mspm0_isr(const struct device *dev);
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#define MSPM0_INTERRUPT_CALLBACK_FN(index) .cb = NULL,
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#else
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#define MSPM0_INTERRUPT_CALLBACK_FN(index)
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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static int uart_mspm0_init(const struct device *dev)
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{
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const struct uart_mspm0_config *config = dev->config;
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struct uart_mspm0_data *data = dev->data;
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const struct device *const clk_dev = DEVICE_DT_GET(DT_NODELABEL(clkmux));
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uint32_t clock_rate;
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int ret;
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/* Reset power */
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DL_UART_Main_reset(config->regs);
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DL_UART_Main_enablePower(config->regs);
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delay_cycles(POWER_STARTUP_DELAY);
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/* Init UART pins */
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ret = pinctrl_apply_state(config->pinctrl, PINCTRL_STATE_DEFAULT);
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if (ret < 0) {
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return ret;
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}
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/* Set UART configs */
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DL_UART_Main_setClockConfig(config->regs,
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(DL_UART_Main_ClockConfig *)&data->UART_ClockConfig);
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DL_UART_Main_init(config->regs, (DL_UART_Main_Config *)&data->UART_Config);
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/*
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* Configure baud rate by setting oversampling and baud rate divisor
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* from the device tree data current-speed
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*/
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ret = clock_control_get_rate(clk_dev, (clock_control_subsys_t)config->clock_subsys,
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&clock_rate);
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if (ret < 0) {
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return ret;
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}
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DL_UART_Main_configBaudRate(config->regs, clock_rate, config->current_speed);
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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config->irq_config_func(dev);
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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/* Enable UART */
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DL_UART_Main_enable(config->regs);
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return 0;
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}
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static int uart_mspm0_poll_in(const struct device *dev, unsigned char *c)
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{
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const struct uart_mspm0_config *config = dev->config;
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return (DL_UART_Main_receiveDataCheck(config->regs, c)) ? 0 : -1;
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}
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static void uart_mspm0_poll_out(const struct device *dev, unsigned char c)
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{
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const struct uart_mspm0_config *config = dev->config;
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DL_UART_Main_transmitDataBlocking(config->regs, c);
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}
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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#define UART_MSPM0_TX_INTERRUPTS (DL_UART_MAIN_INTERRUPT_TX | DL_UART_MAIN_INTERRUPT_EOT_DONE)
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#define UART_MSPM0_RX_INTERRUPTS (DL_UART_MAIN_INTERRUPT_RX)
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static int uart_mspm0_fifo_fill(const struct device *dev, const uint8_t *tx_data, int size)
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{
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const struct uart_mspm0_config *config = dev->config;
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return (int)DL_UART_Main_fillTXFIFO(config->regs, (uint8_t *)tx_data, size);
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}
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static int uart_mspm0_fifo_read(const struct device *dev, uint8_t *rx_data, const int size)
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{
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const struct uart_mspm0_config *config = dev->config;
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return (int)DL_UART_Main_drainRXFIFO(config->regs, rx_data, size);
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}
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static void uart_mspm0_irq_rx_enable(const struct device *dev)
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{
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const struct uart_mspm0_config *config = dev->config;
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DL_UART_Main_enableInterrupt(config->regs, UART_MSPM0_RX_INTERRUPTS);
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}
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static void uart_mspm0_irq_rx_disable(const struct device *dev)
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{
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const struct uart_mspm0_config *config = dev->config;
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DL_UART_Main_disableInterrupt(config->regs, UART_MSPM0_RX_INTERRUPTS);
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}
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static int uart_mspm0_irq_rx_ready(const struct device *dev)
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{
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struct uart_mspm0_data *const dev_data = dev->data;
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return ((dev_data->interruptState & DL_UART_MAIN_INTERRUPT_RX) == DL_UART_MAIN_INTERRUPT_RX)
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? 1
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: 0;
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}
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static void uart_mspm0_irq_tx_enable(const struct device *dev)
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{
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const struct uart_mspm0_config *config = dev->config;
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DL_UART_Main_enableInterrupt(config->regs, UART_MSPM0_TX_INTERRUPTS);
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}
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static void uart_mspm0_irq_tx_disable(const struct device *dev)
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{
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const struct uart_mspm0_config *config = dev->config;
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DL_UART_Main_disableInterrupt(config->regs, UART_MSPM0_TX_INTERRUPTS);
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}
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static int uart_mspm0_irq_tx_ready(const struct device *dev)
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{
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const struct uart_mspm0_config *config = dev->config;
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struct uart_mspm0_data *const dev_data = dev->data;
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return (((dev_data->interruptState & DL_UART_MAIN_INTERRUPT_TX) ==
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DL_UART_MAIN_INTERRUPT_TX) ||
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DL_UART_Main_isTXFIFOEmpty(config->regs))
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? 1
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: 0;
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}
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static int uart_mspm0_irq_tx_complete(const struct device *dev)
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{
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struct uart_mspm0_data *const dev_data = dev->data;
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return ((dev_data->interruptState & DL_UART_MAIN_INTERRUPT_EOT_DONE) ==
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DL_UART_MAIN_INTERRUPT_EOT_DONE)
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? 1
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: 0;
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}
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static int uart_mspm0_irq_is_pending(const struct device *dev)
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{
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struct uart_mspm0_data *const dev_data = dev->data;
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return ((dev_data->interruptState != 0) ? 1 : 0);
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}
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static int uart_mspm0_irq_update(const struct device *dev)
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{
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const struct uart_mspm0_config *config = dev->config;
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struct uart_mspm0_data *const dev_data = dev->data;
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dev_data->interruptState = DL_UART_Main_getEnabledInterruptStatus(
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config->regs, UART_MSPM0_RX_INTERRUPTS | UART_MSPM0_TX_INTERRUPTS);
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/*
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* Clear interrupts explicitly after storing all in the update. Interrupts
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* can be re-set by the MIS during the ISR should they be available.
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*/
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DL_UART_Main_clearInterruptStatus(config->regs, dev_data->interruptState);
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return 1;
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}
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static void uart_mspm0_irq_callback_set(const struct device *dev, uart_irq_callback_user_data_t cb,
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void *cb_data)
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{
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struct uart_mspm0_data *const dev_data = dev->data;
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/* Set callback function and data */
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dev_data->cb = cb;
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dev_data->cb_data = cb_data;
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}
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/**
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* @brief Interrupt service routine.
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*
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* This simply calls the callback function, if one exists.
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*
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* @param arg Argument to ISR.
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*/
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static void uart_mspm0_isr(const struct device *dev)
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{
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const struct uart_mspm0_config *config = dev->config;
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struct uart_mspm0_data *const dev_data = dev->data;
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uint32_t int_status;
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/* Perform callback if defined */
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if (dev_data->cb) {
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dev_data->cb(dev, dev_data->cb_data);
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} else {
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/* error, callback necessary in order to make progress. Clear interrupts
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* temporarily.
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*/
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int_status = DL_UART_Main_getEnabledInterruptStatus(
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config->regs, UART_MSPM0_TX_INTERRUPTS | UART_MSPM0_RX_INTERRUPTS);
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DL_UART_Main_clearInterruptStatus(config->regs, int_status);
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}
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}
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#define MSP_UART_IRQ_REGISTER(index) \
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static void uart_mspm0_##index##_irq_register(const struct device *dev) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(index), DT_INST_IRQ(index, priority), uart_mspm0_isr, \
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DEVICE_DT_INST_GET(index), 0); \
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irq_enable(DT_INST_IRQN(index)); \
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}
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#else
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#define MSP_UART_IRQ_REGISTER(index)
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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static const struct uart_driver_api uart_mspm0_driver_api = {
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.poll_in = uart_mspm0_poll_in,
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.poll_out = uart_mspm0_poll_out,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.fifo_fill = uart_mspm0_fifo_fill,
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.fifo_read = uart_mspm0_fifo_read,
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.irq_tx_enable = uart_mspm0_irq_tx_enable,
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.irq_tx_disable = uart_mspm0_irq_tx_disable,
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.irq_tx_ready = uart_mspm0_irq_tx_ready,
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.irq_rx_enable = uart_mspm0_irq_rx_enable,
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.irq_rx_disable = uart_mspm0_irq_rx_disable,
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.irq_tx_complete = uart_mspm0_irq_tx_complete,
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.irq_rx_ready = uart_mspm0_irq_rx_ready,
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.irq_is_pending = uart_mspm0_irq_is_pending,
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.irq_update = uart_mspm0_irq_update,
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.irq_callback_set = uart_mspm0_irq_callback_set,
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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#define MSPM0_UART_INIT_FN(index) \
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\
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PINCTRL_DT_INST_DEFINE(index); \
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\
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static const struct mspm0_clockSys mspm0_uart_clockSys##index = \
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MSPM0_CLOCK_SUBSYS_FN(index); \
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\
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MSP_UART_IRQ_REGISTER(index) \
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\
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static const struct uart_mspm0_config uart_mspm0_cfg_##index = { \
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.regs = (UART_Regs *)DT_INST_REG_ADDR(index), \
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.current_speed = DT_INST_PROP(index, current_speed), \
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.pinctrl = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \
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.clock_subsys = &mspm0_uart_clockSys##index, \
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IF_ENABLED(CONFIG_UART_INTERRUPT_DRIVEN, \
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(.irq_config_func = uart_mspm0_##index##_irq_register,)) }; \
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\
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static struct uart_mspm0_data uart_mspm0_data_##index = { \
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.UART_ClockConfig = {.clockSel = (DT_INST_CLOCKS_CELL(index, bus) & \
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MSPM0_CLOCK_SEL_MASK), \
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.divideRatio = DL_UART_MAIN_CLOCK_DIVIDE_RATIO_1}, \
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.UART_Config = \
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{ \
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.mode = DL_UART_MAIN_MODE_NORMAL, \
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.direction = DL_UART_MAIN_DIRECTION_TX_RX, \
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.flowControl = (DT_INST_PROP(index, hw_flow_control) \
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? DL_UART_MAIN_FLOW_CONTROL_RTS_CTS \
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: DL_UART_MAIN_FLOW_CONTROL_NONE), \
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.parity = DL_UART_MAIN_PARITY_NONE, \
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.wordLength = DL_UART_MAIN_WORD_LENGTH_8_BITS, \
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.stopBits = DL_UART_MAIN_STOP_BITS_ONE, \
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}, \
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MSPM0_INTERRUPT_CALLBACK_FN(index)}; \
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\
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DEVICE_DT_INST_DEFINE(index, &uart_mspm0_init, NULL, &uart_mspm0_data_##index, \
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&uart_mspm0_cfg_##index, PRE_KERNEL_1, CONFIG_SERIAL_INIT_PRIORITY, \
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&uart_mspm0_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(MSPM0_UART_INIT_FN)

‎dts/bindings/serial/ti,mspm0-uart.yaml‎

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description: TI MSPM0 UART
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compatible: "ti,mspm0-uart"
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include: [uart-controller.yaml, pinctrl-device.yaml, base.yaml]
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properties:
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reg:
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required: true
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interrupts:
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required: true
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pinctrl-0:
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required: true
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pinctrl-names:
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required: true

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