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cmake/linker_script/common Expand file tree Collapse file tree 7 files changed +29
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lines changed Original file line number Diff line number Diff line change @@ -472,6 +472,7 @@ config ISR_TABLES_LOCAL_DECLARATION
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config DYNAMIC_INTERRUPTS
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bool "Installation of IRQs at runtime"
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+ select SRAM_SW_ISR_TABLE
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help
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Enable installation of interrupts at runtime, which will move some
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interrupt-related data structures to RAM instead of ROM, and
@@ -598,6 +599,12 @@ config SRAM_VECTOR_TABLE
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When XiP is enabled, this option will result in the vector table being
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relocated from Flash to SRAM.
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+ config SRAM_SW_ISR_TABLE
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+ bool "Place the software ISR table in SRAM instead of flash"
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+ help
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+ The option specifies that the software interrupts vector table will be
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+ placed inside SRAM instead of the flash.
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+
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config IRQ_OFFLOAD_NESTED
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bool "irq_offload() supports nested IRQs"
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depends on IRQ_OFFLOAD
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# The contents of this file is based on include/zephyr/linker/common-ram.ld
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# Please keep in sync
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- if (CONFIG_GEN_SW_ISR_TABLE AND CONFIG_DYNAMIC_INTERRUPTS )
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+ if (CONFIG_GEN_SW_ISR_TABLE AND CONFIG_SRAM_SW_ISR_TABLE )
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# ld align has been changed to subalign to provide identical behavior scatter vs. ld.
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zephyr_linker_section (NAME sw_isr_table
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GROUP DATA_REGION
Original file line number Diff line number Diff line change @@ -13,7 +13,7 @@ zephyr_linker_section_obj_level(SECTION init LEVEL SMP)
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zephyr_iterable_section (NAME device NUMERIC KVMA RAM_REGION GROUP RODATA_REGION )
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- if (CONFIG_GEN_SW_ISR_TABLE AND NOT CONFIG_DYNAMIC_INTERRUPTS )
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+ if (CONFIG_GEN_SW_ISR_TABLE AND NOT CONFIG_SRAM_SW_ISR_TABLE )
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# ld align has been changed to subalign to provide identical behavior scatter vs. ld.
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zephyr_linker_section (NAME sw_isr_table KVMA FLASH GROUP RODATA_REGION SUBALIGN ${CONFIG_ARCH_SW_ISR_TABLE_ALIGN} NOINPUT )
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zephyr_linker_section_configure (
Original file line number Diff line number Diff line change @@ -197,6 +197,10 @@ generate exceptions that need to be handled synchronously (e.g. kernel panic).
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The feature is currently implemented in the ARM Cortex-M architecture
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variant.
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+ .. tip ::
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+ To mitigate flash access latency, consider relocating ISRs and all related
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+ symbols to RAM. This eliminates flash access delays.
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+
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Offloading ISR Work
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===================
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@@ -374,6 +378,16 @@ Cortex-M architecture variant via the macro
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:c:macro: `ARM_IRQ_DIRECT_DYNAMIC_CONNECT `, which can be used to declare a direct
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and dynamic interrupt.
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+ RAM-based ISR Execution
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+ =======================
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+
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+ For ultra-low latency, ISRs and vector tables can be relocated to RAM to eliminate
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+ flash access delays. :kconfig:option: `CONFIG_SRAM_VECTOR_TABLE ` and
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+ :kconfig:option: `CONFIG_SRAM_SW_ISR_TABLE ` will help you have interrupt vectors
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+ in RAM. :kconfig:option: `CONFIG_DEVICE_MUTABLE ` will help you put the device
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+ structure in RAM and :kconfig:option: `CONFIG_CODE_DATA_RELOCATION ` will help you relocate
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+ the ISR and all the related symbols to RAM.
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+
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Sharing an interrupt line
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=========================
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Original file line number Diff line number Diff line change @@ -75,6 +75,10 @@ New APIs and options
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.. zephyr-keep-sorted-start re(^\* \w)
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+ * Architectures
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+
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+ * :kconfig:option: `CONFIG_SRAM_SW_ISR_TABLE `
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+
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* Power management
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* :c:func: `pm_device_driver_deinit `
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ITERABLE_SECTION_RAM(scmi_protocol, Z_LINK_ITERABLE_SUBALIGN)
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#endif /* CONFIG_ARM_SCMI */
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- #if defined(CONFIG_GEN_SW_ISR_TABLE) && defined(CONFIG_DYNAMIC_INTERRUPTS )
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+ #if defined(CONFIG_GEN_SW_ISR_TABLE) && defined(CONFIG_SRAM_SW_ISR_TABLE )
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SECTION_DATA_PROLOGUE(sw_isr_table,,)
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{
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/*
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} GROUP_ROM_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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#endif
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- #if defined(CONFIG_GEN_SW_ISR_TABLE) && !defined(CONFIG_DYNAMIC_INTERRUPTS )
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+ #if defined(CONFIG_GEN_SW_ISR_TABLE) && !defined(CONFIG_SRAM_SW_ISR_TABLE )
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SECTION_PROLOGUE(sw_isr_table,,)
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{
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/*
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