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Hieu Nguyentiennguyenzg
Hieu Nguyen
authored and
tiennguyenzg
committed
dts: renesas: Add DMA support for Renesas RZ/V2L, A3UL, T2M, N2L
Add DMA nodes to Renesas RZ/V2L, A3UL, T2M, N2L Signed-off-by: Hieu Nguyen <[email protected]> Signed-off-by: Tien Nguyen <[email protected]>
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+190
-3
lines changed

5 files changed

+190
-3
lines changed

‎dts/arm/renesas/rz/rzg/r9a08g045.dtsi‎

Lines changed: 23 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*
22
* Copyright (c) 2024 EPAM Systems
3-
* Copyright (c) 2024 Renesas Electronics Corporation
3+
* Copyright (c) 2024-2025 Renesas Electronics Corporation
44
* SPDX-License-Identifier: Apache-2.0
55
*/
66

@@ -406,7 +406,7 @@
406406
};
407407

408408
dma0: dma@41800000 { /* Secure DMA */
409-
compatible = "renesas,rz-dma";
409+
compatible = "renesas,rz-dmac-b";
410410
reg = <0x41800000 0x800>, <0x41810000 0x20>;
411411
reg-names = "reg_main", "ext";
412412
interrupts = <95 1>, <96 1>, <97 1>, <98 1>,
@@ -419,9 +419,29 @@
419419
"ch8", "ch9", "ch10", "ch11",
420420
"ch12", "ch13", "ch14", "ch15",
421421
"err1";
422+
dma-unit = <0>;
423+
dma-channels = <16>;
424+
#dma-cells = <2>;
425+
status = "disabled";
426+
};
427+
428+
dma1: dma@41820000 { /* Secure DMA */
429+
compatible = "renesas,rz-dmac-b";
430+
reg = <0x41820000 0x800>, <0x41830000 0x20>;
431+
reg-names = "reg_main", "ext";
432+
interrupts = <112 1>, <113 1>, <114 1>, <115 1>,
433+
<116 1>, <117 1>, <118 1>, <119 1>,
434+
<120 1>, <121 1>, <122 1>, <123 1>,
435+
<124 1>, <125 1>, <126 1>, <127 1>,
436+
<111 1>; /* DMAERR1 */
437+
interrupt-names = "ch0", "ch1", "ch2", "ch3",
438+
"ch4", "ch5", "ch6", "ch7",
439+
"ch8", "ch9", "ch10", "ch11",
440+
"ch12", "ch13", "ch14", "ch15",
441+
"err1";
442+
dma-unit = <1>;
422443
dma-channels = <16>;
423444
#dma-cells = <2>;
424-
dma-buf-addr-alignment = <4>;
425445
status = "disabled";
426446
};
427447

‎dts/arm/renesas/rz/rzn/r9a07g084.dtsi‎

Lines changed: 38 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1259,6 +1259,44 @@
12591259
};
12601260
};
12611261

1262+
dma0: dma@80080000 {
1263+
compatible = "renesas,rz-dmac";
1264+
reg = <0x80080000 0x1000>;
1265+
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1266+
<GIC_SPI 22 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1267+
<GIC_SPI 23 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1268+
<GIC_SPI 24 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1269+
<GIC_SPI 25 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1270+
<GIC_SPI 26 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1271+
<GIC_SPI 27 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1272+
<GIC_SPI 28 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
1273+
interrupt-names = "ch0", "ch1", "ch2", "ch3",
1274+
"ch4", "ch5", "ch6", "ch7";
1275+
dma-unit = <0>;
1276+
dma-channels = <8>;
1277+
#dma-cells = <2>;
1278+
status = "disabled";
1279+
};
1280+
1281+
dma1: dma@80081000 {
1282+
compatible = "renesas,rz-dmac";
1283+
reg = <0x80081000 0x1000>;
1284+
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1285+
<GIC_SPI 38 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1286+
<GIC_SPI 39 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1287+
<GIC_SPI 40 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1288+
<GIC_SPI 41 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1289+
<GIC_SPI 42 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1290+
<GIC_SPI 43 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1291+
<GIC_SPI 44 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
1292+
interrupt-names = "ch0", "ch1", "ch2", "ch3",
1293+
"ch4", "ch5", "ch6", "ch7";
1294+
dma-unit = <1>;
1295+
dma-channels = <8>;
1296+
#dma-cells = <2>;
1297+
status = "disabled";
1298+
};
1299+
12621300
wdt0: watchdog@80042000 {
12631301
compatible = "renesas,rz-wdt";
12641302
reg = <0x80042000 0x1000>;

‎dts/arm/renesas/rz/rzt/r9a07g075.dtsi‎

Lines changed: 58 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1263,6 +1263,64 @@
12631263
};
12641264
};
12651265

1266+
dma0: dma@80080000 {
1267+
compatible = "renesas,rz-dmac";
1268+
reg = <0x80080000 0x1000>;
1269+
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1270+
<GIC_SPI 22 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1271+
<GIC_SPI 23 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1272+
<GIC_SPI 24 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1273+
<GIC_SPI 25 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1274+
<GIC_SPI 26 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1275+
<GIC_SPI 27 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1276+
<GIC_SPI 28 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1277+
<GIC_SPI 29 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1278+
<GIC_SPI 30 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1279+
<GIC_SPI 31 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1280+
<GIC_SPI 32 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1281+
<GIC_SPI 33 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1282+
<GIC_SPI 34 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1283+
<GIC_SPI 35 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1284+
<GIC_SPI 36 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
1285+
interrupt-names = "ch0", "ch1", "ch2", "ch3",
1286+
"ch4", "ch5", "ch6", "ch7",
1287+
"ch8", "ch9", "ch10", "ch11",
1288+
"ch12", "ch13", "ch14", "ch15";
1289+
dma-unit = <0>;
1290+
dma-channels = <16>;
1291+
#dma-cells = <2>;
1292+
status = "disabled";
1293+
};
1294+
1295+
dma1: dma@80081000 {
1296+
compatible = "renesas,rz-dmac";
1297+
reg = <0x80081000 0x1000>;
1298+
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1299+
<GIC_SPI 38 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1300+
<GIC_SPI 39 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1301+
<GIC_SPI 40 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1302+
<GIC_SPI 41 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1303+
<GIC_SPI 42 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1304+
<GIC_SPI 43 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1305+
<GIC_SPI 44 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1306+
<GIC_SPI 45 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1307+
<GIC_SPI 46 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1308+
<GIC_SPI 47 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1309+
<GIC_SPI 48 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1310+
<GIC_SPI 49 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1311+
<GIC_SPI 50 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1312+
<GIC_SPI 51 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1313+
<GIC_SPI 52 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
1314+
interrupt-names = "ch0", "ch1", "ch2", "ch3",
1315+
"ch4", "ch5", "ch6", "ch7",
1316+
"ch8", "ch9", "ch10", "ch11",
1317+
"ch12", "ch13", "ch14", "ch15";
1318+
dma-unit = <1>;
1319+
dma-channels = <16>;
1320+
#dma-cells = <2>;
1321+
status = "disabled";
1322+
};
1323+
12661324
wdt0: watchdog@80042000 {
12671325
compatible = "renesas,rz-wdt";
12681326
reg = <0x80042000 0x1000>;

‎dts/arm/renesas/rz/rzv/r9a07g054.dtsi‎

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1074,6 +1074,46 @@
10741074
status = "disabled";
10751075
};
10761076
};
1077+
1078+
dma0: dma@41800000 { /* Secure DMA */
1079+
compatible = "renesas,rz-dmac-b";
1080+
reg = <0x41800000 0x800>, <0x41810000 0x20>;
1081+
reg-names = "reg_main", "ext";
1082+
interrupts = <108 1>, <109 1>, <110 1>, <111 1>,
1083+
<112 1>, <113 1>, <114 1>, <115 1>,
1084+
<116 1>, <117 1>, <118 1>, <119 1>,
1085+
<120 1>, <121 1>, <122 1>, <123 1>,
1086+
<124 1>; /* DMAERR */
1087+
interrupt-names = "ch0", "ch1", "ch2", "ch3",
1088+
"ch4", "ch5", "ch6", "ch7",
1089+
"ch8", "ch9", "ch10", "ch11",
1090+
"ch12", "ch13", "ch14", "ch15",
1091+
"err1";
1092+
dma-unit = <0>;
1093+
dma-channels = <16>;
1094+
#dma-cells = <2>;
1095+
status = "disabled";
1096+
};
1097+
1098+
dma1: dma@41820000 { /* Secure DMA */
1099+
compatible = "renesas,rz-dmac-b";
1100+
reg = <0x41820000 0x800>, <0x41830000 0x20>;
1101+
reg-names = "reg_main", "ext";
1102+
interrupts = <125 1>, <126 1>, <127 1>, <128 1>,
1103+
<129 1>, <130 1>, <131 1>, <132 1>,
1104+
<133 1>, <134 1>, <135 1>, <136 1>,
1105+
<137 1>, <138 1>, <139 1>, <140 1>,
1106+
<141 1>; /* DMAERR */
1107+
interrupt-names = "ch0", "ch1", "ch2", "ch3",
1108+
"ch4", "ch5", "ch6", "ch7",
1109+
"ch8", "ch9", "ch10", "ch11",
1110+
"ch12", "ch13", "ch14", "ch15",
1111+
"err1";
1112+
dma-unit = <1>;
1113+
dma-channels = <16>;
1114+
#dma-cells = <2>;
1115+
status = "disabled";
1116+
};
10771117
};
10781118
};
10791119

‎dts/arm64/renesas/rz/rza/r9a07g063.dtsi‎

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -912,6 +912,37 @@
912912
};
913913
};
914914

915+
dma0: dma@11820000 {
916+
compatible = "renesas,rz-dmac";
917+
reg = <0x11820000 0x800>, <0x11830000 0x20>;
918+
reg-names = "reg_main", "ext";
919+
interrupts = <GIC_SPI 125 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
920+
<GIC_SPI 126 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
921+
<GIC_SPI 127 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
922+
<GIC_SPI 128 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
923+
<GIC_SPI 129 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
924+
<GIC_SPI 130 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
925+
<GIC_SPI 131 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
926+
<GIC_SPI 132 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
927+
<GIC_SPI 133 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
928+
<GIC_SPI 134 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
929+
<GIC_SPI 135 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
930+
<GIC_SPI 136 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
931+
<GIC_SPI 137 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
932+
<GIC_SPI 138 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
933+
<GIC_SPI 139 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
934+
<GIC_SPI 140 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
935+
<GIC_SPI 141 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
936+
interrupt-names = "ch0", "ch1", "ch2", "ch3",
937+
"ch4", "ch5", "ch6", "ch7",
938+
"ch8", "ch9", "ch10", "ch11",
939+
"ch12", "ch13", "ch14", "ch15",
940+
"err1";
941+
dma-channels = <16>;
942+
#dma-cells = <2>;
943+
status = "disabled";
944+
};
945+
915946
wdt0: watchdog@12800800 {
916947
compatible = "renesas,rz-wdt";
917948
reg = <0x12800800 DT_SIZE_K(1)>;

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