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lucien-nxpnashif
lucien-nxp
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soc: nxp: imxrt: add imxrt118x series and update related files
Add new RT118x device, due to structure is different from rt11xx series. Boot header also differ from rt10xx and rt11xx, so add support for boot container. define new container name and new container tag Signed-off-by: Lucien Zhao <[email protected]>
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16 files changed

+786
-9
lines changed

16 files changed

+786
-9
lines changed

‎include/zephyr/linker/section_tags.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -44,6 +44,7 @@
4444
#define __imx_boot_data_section Z_GENERIC_SECTION(_IMX_BOOT_DATA_SECTION_NAME)
4545
#define __imx_boot_ivt_section Z_GENERIC_SECTION(_IMX_BOOT_IVT_SECTION_NAME)
4646
#define __imx_boot_dcd_section Z_GENERIC_SECTION(_IMX_BOOT_DCD_SECTION_NAME)
47+
#define __imx_boot_container_section Z_GENERIC_SECTION(_IMX_BOOT_CONTAINER_SECTION_NAME)
4748
#define __stm32_sdram1_section Z_GENERIC_SECTION(_STM32_SDRAM1_SECTION_NAME)
4849
#define __stm32_sdram2_section Z_GENERIC_SECTION(_STM32_SDRAM2_SECTION_NAME)
4950
#define __stm32_backup_sram_section Z_GENERIC_SECTION(_STM32_BACKUP_SRAM_SECTION_NAME)

‎include/zephyr/linker/sections.h

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@@ -67,6 +67,7 @@
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#define _IMX_BOOT_DATA_SECTION_NAME .boot_hdr.data
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#define _IMX_BOOT_IVT_SECTION_NAME .boot_hdr.ivt
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#define _IMX_BOOT_DCD_SECTION_NAME .boot_hdr.dcd_data
70+
#define _IMX_BOOT_CONTAINER_SECTION_NAME .boot_hdr.container
7071

7172
#define _STM32_SDRAM1_SECTION_NAME .stm32_sdram1
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#define _STM32_SDRAM2_SECTION_NAME .stm32_sdram2

‎soc/nxp/imxrt/CMakeLists.txt

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Original file line numberDiff line numberDiff line change
@@ -37,6 +37,24 @@ if(CONFIG_SOC_SERIES_IMXRT10XX OR CONFIG_SOC_SERIES_IMXRT11XX)
3737
zephyr_compile_definitions(XIP_EXTERNAL_FLASH)
3838
endif()
3939

40+
if(CONFIG_SOC_SERIES_IMXRT118X)
41+
zephyr_linker_section_configure(
42+
SECTION .rom_start
43+
INPUT ".boot_hdr.conf"
44+
OFFSET ${CONFIG_FLEXSPI_CONFIG_BLOCK_OFFSET}
45+
KEEP
46+
PRIO 10
47+
)
48+
zephyr_linker_section_configure(
49+
SECTION .rom_start
50+
INPUT ".boot_hdr.container"
51+
OFFSET ${CONFIG_IMAGE_CONTAINER_OFFSET}
52+
KEEP
53+
PRIO 11
54+
)
55+
zephyr_compile_definitions(XIP_EXTERNAL_FLASH)
56+
endif()
57+
4058
if(CONFIG_SOC_SERIES_IMXRT6XX OR CONFIG_SOC_SERIES_IMXRT5XX)
4159
zephyr_linker_sources_ifdef(CONFIG_USB_DEVICE_DRIVER SECTIONS usb.ld)
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zephyr_linker_sources_ifdef(CONFIG_UDC_DRIVER SECTIONS usb.ld)
@@ -45,3 +63,7 @@ endif()
4563
if(CONFIG_MEMC)
4664
zephyr_library_include_directories(${ZEPHYR_BASE}/drivers/memc)
4765
endif()
66+
67+
if(CONFIG_SOC_SERIES_IMXRT118X)
68+
zephyr_linker_sources_ifdef(CONFIG_SOC_SERIES_IMXRT118X SECTIONS container.ld)
69+
endif()

‎soc/nxp/imxrt/Kconfig

Lines changed: 26 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,7 @@ if FLASH_MCUX_FLEXSPI_XIP && MEMC_MCUX_FLEXSPI
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3030
choice FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET
3131
prompt "FlexSPI drivers relocation target"
32+
default FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM if SOC_MIMXRT1189_CM33 # RT118X_CM33 core lacks ITCM
3233
default FLASH_MCUX_FLEXSPI_XIP_MEM_ITCM
3334
help
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Select the location to run the FlexSPI drivers when using
@@ -96,6 +97,28 @@ config FLEXSPI_CONFIG_BLOCK_OFFSET
9697
sequence (optional), etc. The boot ROM expects FlexSPI configuration
9798
parameter to be presented in serial nor flash.
9899

100+
config IMAGE_CONTAINER_OFFSET
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hex "Image container"
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default 0x1000
103+
depends on SOC_SERIES_IMXRT118X
104+
help
105+
Image container is a boot image format that is used by ROM. Container
106+
format consists container header, image arrary entry, signature block
107+
and user program images and data. The boot ROM expects container data
108+
to be saved in external memory.
109+
110+
# Note- This config present the offest between container header and user
111+
# image. If ROM_START_OFFSET changed, you also need to change CONTAINER_USER_IMAGE_OFFSET
112+
# value. CONTAINER_USER_IMAGE_OFFSET = ROM_START_OFFSET - IMAGE_CONTAINER_OFFSET.
113+
config CONTAINER_USER_IMAGE_OFFSET
114+
hex "The offset between container header and user image"
115+
default 0xA000
116+
depends on SOC_SERIES_IMXRT118X
117+
help
118+
The offset between container and user image. IF change the user image
119+
start address, please don't forget to modify CONTAINER_USER_IMAGE_OFFSET
120+
value, this will make ROM could get the user image start address.
121+
99122
config IMAGE_VECTOR_TABLE_OFFSET
100123
hex "Image vector table offset"
101124
default 0x1000 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR
@@ -113,7 +136,6 @@ config DEVICE_CONFIGURATION_DATA
113136
useful if your application expects components like SDRAM to be
114137
initialized at boot time.
115138

116-
117139
config EXTERNAL_MEM_CONFIG_DATA
118140
bool "External Memory Configuration Data"
119141
depends on !DEVICE_CONFIGURATION_DATA
@@ -171,12 +193,11 @@ config SECOND_CORE_MCUX
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generated header specifying the VMA and LMA of each memory section
172194
to load
173195

174-
175196
config FLEXSPI_CONFIG_BLOCK_OFFSET
176197
hex
177-
default 0x400 if SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX
198+
default 0x400 if SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX || SOC_SERIES_IMXRT118X
178199

179-
if SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX
200+
if SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX || SOC_SERIES_IMXRT118X
180201

181202
config PM_MCUX_GPC
182203
bool "MCUX general power controller driver"
@@ -206,6 +227,6 @@ config INIT_ENET_PLL
206227
config INIT_SYS_PLL
207228
bool "Initialize System PLL"
208229

209-
endif # SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX
230+
endif # SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX || SOC_SERIES_IMXRT118X
210231

211232
endif # SOC_FAMILY_NXP_IMXRT

‎soc/nxp/imxrt/Kconfig.defconfig

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -7,14 +7,15 @@ if SOC_FAMILY_NXP_IMXRT
77
# can override the defaults given here
88
rsource "*/Kconfig.defconfig"
99

10-
if SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX
10+
if SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX || SOC_SERIES_IMXRT118X
1111

1212
config SERIAL_INIT_PRIORITY
1313
default 55 if SERIAL
1414
depends on SERIAL
1515

1616
config ROM_START_OFFSET
1717
default 0x400 if BOOTLOADER_MCUBOOT
18+
default 0xb000 if BOOT_FLEXSPI_NOR && SOC_SERIES_IMXRT118X
1819
default 0x2000 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR
1920

2021
config PINCTRL_IMX
@@ -75,7 +76,7 @@ config SYSTEM_WORKQUEUE_STACK_SIZE
7576
endif # ETH_NXP_ENET
7677

7778
config MEMC
78-
default y
79+
default y if !SOC_SERIES_IMXRT118X # RT118X lacks FLEXRAM
7980

8081
choice USB_MCUX_CONTROLLER_TYPE
8182
default USB_DC_NXP_EHCI
@@ -116,7 +117,7 @@ endif # MBEDTLS
116117
config CACHE_MANAGEMENT
117118
default y if CPU_CORTEX_M7
118119

119-
endif # SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX
120+
endif # SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX || SOC_SERIES_IMXRT118X
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121122
# Logic to set flash size for all IMXRT parts
122123
DT_CHOSEN_Z_FLASH := zephyr,flash

‎soc/nxp/imxrt/boot_header.ld

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@@ -4,15 +4,25 @@
44
* SPDX-License-Identifier: Apache-2.0
55
*/
66

7+
#if defined(CONFIG_SOC_SERIES_IMXRT118X)
8+
__VECTOR_TABLE = CONFIG_ROM_START_OFFSET;
9+
__Vectors = __VECTOR_TABLE;
10+
#endif
11+
712
. = CONFIG_FLEXSPI_CONFIG_BLOCK_OFFSET;
8-
#if defined(CONFIG_SOC_SERIES_IMXRT11XX) || defined(CONFIG_SOC_SERIES_IMXRT10XX)
13+
#if defined(CONFIG_SOC_SERIES_IMXRT11XX) || defined(CONFIG_SOC_SERIES_IMXRT10XX) || defined(CONFIG_SOC_SERIES_IMXRT118X)
914
KEEP(*(.boot_hdr.conf))
1015
#endif
1116
#if defined(CONFIG_SOC_SERIES_IMXRT6XX) || defined(CONFIG_SOC_SERIES_IMXRT5XX)
1217
KEEP(*(.flash_conf))
1318
#endif
19+
#if defined(CONFIG_SOC_SERIES_IMXRT118X)
20+
. = CONFIG_IMAGE_CONTAINER_OFFSET;
21+
KEEP(*(.boot_hdr.container))
22+
#else
1423
. = CONFIG_IMAGE_VECTOR_TABLE_OFFSET;
1524
KEEP(*(.boot_hdr.ivt))
25+
#endif
1626
#if defined(CONFIG_SOC_SERIES_IMXRT11XX) || defined(CONFIG_SOC_SERIES_IMXRT10XX)
1727
KEEP(*(.boot_hdr.data))
1828
#ifdef CONFIG_DEVICE_CONFIGURATION_DATA

‎soc/nxp/imxrt/container.ld

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,10 @@
1+
/*
2+
* Copyright 2024 NXP
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#if defined(CONFIG_SOC_SERIES_IMXRT118X) && CONFIG_NXP_IMXRT_BOOT_HEADER
8+
__CONTAINER_IMG_OFFSET = CONFIG_CONTAINER_USER_IMAGE_OFFSET;
9+
__CONTAINER_IMG_SIZE = _flash_used;
10+
#endif

‎soc/nxp/imxrt/imxrt118x/CMakeLists.txt

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@@ -0,0 +1,11 @@
1+
#
2+
# Copyright 2024 NXP
3+
#
4+
# SPDX-License-Identifier: Apache-2.0
5+
#
6+
7+
zephyr_sources(soc.c)
8+
9+
zephyr_include_directories(.)
10+
11+
set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/linker.ld CACHE INTERNAL "")

‎soc/nxp/imxrt/imxrt118x/Kconfig

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,52 @@
1+
# Copyright 2024 NXP
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
config SOC_SERIES_IMXRT118X
5+
select CPU_CORTEX_M_HAS_DWT
6+
select PLATFORM_SPECIFIC_INIT
7+
select INIT_ARCH_HW_AT_BOOT if SOC_MIMXRT1189_CM33
8+
select ARM
9+
select CLOCK_CONTROL
10+
select HAS_MCUX_CACHE
11+
select ARMV8_M_DSP if SOC_MIMXRT1189_CM33
12+
select CPU_HAS_ARM_SAU if SOC_MIMXRT1189_CM33
13+
select HAS_MCUX
14+
select CPU_HAS_ARM_MPU
15+
select INIT_ARM_PLL
16+
select ARM_TRUSTZONE_M if SOC_MIMXRT1189_CM33
17+
select CPU_HAS_ICACHE if SOC_MIMXRT1189_CM7
18+
select CPU_HAS_DCACHE if SOC_MIMXRT1189_CM7
19+
select CPU_HAS_FPU
20+
select CPU_HAS_FPU_DOUBLE_PRECISION if SOC_MIMXRT1189_CM7
21+
select HAS_MCUX_IOMUXC
22+
select HAS_SWO
23+
24+
config SOC_MIMXRT1189_CM33
25+
select CPU_CORTEX_M33
26+
27+
config SOC_MIMXRT1189_CM7
28+
select CPU_CORTEX_M7
29+
30+
if SOC_SERIES_IMXRT118X
31+
32+
config MCUX_CORE_SUFFIX
33+
default "_cm7" if SOC_MIMXRT1189_CM7
34+
default "_cm33" if SOC_MIMXRT1189_CM33
35+
36+
config TRDC_MCUX_TRDC
37+
default y
38+
bool "Use TRDC MCUX Driver"
39+
40+
config S3MU_MCUX_S3MU
41+
default y
42+
bool "Use S3MU MCUX Driver"
43+
44+
config IMXRT118X_CM33_XCACHE_PS
45+
bool "Use CM33 XCACHE_PS"
46+
default y if SOC_MIMXRT1189_CM33
47+
help
48+
Use CM33 XCACHE_PS at boot. Please note XCACHE_PC have been
49+
enabled in SystemInit function. If this Kconfig is cleared,
50+
the XCACHE controller won't be enabled during SOC init
51+
52+
endif # SOC_SERIES_IMXRT118X

‎soc/nxp/imxrt/imxrt118x/Kconfig.defconfig

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,34 @@
1+
# Copyright 2024 NXP
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
if SOC_SERIES_IMXRT118X
5+
6+
config NUM_IRQS
7+
default 239
8+
9+
config GPIO
10+
default y
11+
12+
if CORTEX_M_SYSTICK
13+
14+
config SYS_CLOCK_HW_CYCLES_PER_SEC
15+
default 240000000 if SOC_MIMXRT1189_CM33
16+
default 792000000 if SOC_MIMXRT1189_CM7
17+
18+
endif # CORTEX_M_SYSTICK
19+
20+
config DCDC_VALUE
21+
default 0x13
22+
23+
config FLEXSPI_CONFIG_BLOCK_OFFSET
24+
default 0x400 if BOOT_FLEXSPI_NOR
25+
26+
if SECOND_CORE_MCUX
27+
28+
# RT Boot header is only needed on primary core
29+
config NXP_IMXRT_BOOT_HEADER
30+
default y
31+
depends on !(CPU_CORTEX_M7 || BOOTLOADER_MCUBOOT)
32+
33+
endif
34+
endif

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