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nashifMaureenHelm
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timing: add support for x86
Add initial support for X86 and get timestamps from tsc. Authored-by: Daniel Leung <[email protected]> Signed-off-by: Anas Nashif <[email protected]>
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arch/x86/CMakeLists.txt

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@@ -54,3 +54,9 @@ if (CONFIG_MMU)
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add_bin_file_to_the_next_link(pagetables_bin_target pagetables)
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endif()
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if(CONFIG_ARCH_HAS_TIMING_FUNCTIONS AND
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NOT CONFIG_SOC_HAS_TIMING_FUNCTIONS AND
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NOT CONFIG_BOARD_HAS_TIMING_FUNCTIONS)
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zephyr_library_sources_ifdef(CONFIG_TIMING_FUNCTIONS timing.c)
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endif()

arch/x86/timing.c

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/*
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* Copyright (c) 2020 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arch/x86/arch.h>
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#include <kernel.h>
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#include <sys_clock.h>
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#include <timing/timing.h>
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static uint64_t tsc_freq;
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void timing_x86_init(void)
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{
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uint32_t cyc_start = k_cycle_get_32();
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uint64_t tsc_start = z_tsc_read();
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k_busy_wait(10 * USEC_PER_MSEC);
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uint32_t cyc_end = k_cycle_get_32();
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uint64_t tsc_end = z_tsc_read();
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uint64_t cyc_freq = sys_clock_hw_cycles_per_sec();
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/*
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* cycles are in 32-bit, and delta must be
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* calculated in 32-bit percision. Or it would
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* wrapping around in 64-bit.
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*/
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uint64_t dcyc = (uint32_t)cyc_end - (uint32_t)cyc_start;
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uint64_t dtsc = tsc_end - tsc_start;
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tsc_freq = (cyc_freq * dtsc) / dcyc;
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}
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uint64_t timing_x86_freq_get(void)
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{
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return tsc_freq;
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}
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void timing_init(void)
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{
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timing_x86_init();
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}
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void timing_start(void)
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{
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}
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void timing_stop(void)
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{
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}
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timing_t timing_counter_get(void)
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{
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return k_cycle_get_32();
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}
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uint64_t timing_cycles_get(volatile timing_t *const start,
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volatile timing_t *const end)
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{
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return (*end - *start);
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}
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uint64_t timing_freq_get(void)
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{
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return timing_x86_freq_get();
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}
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uint64_t timing_cycles_to_ns(uint64_t cycles)
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{
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return k_cyc_to_ns_floor64(cycles);
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}
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uint64_t timing_cycles_to_ns_avg(uint64_t cycles, uint32_t count)
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{
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return timing_cycles_to_ns(cycles) / count;
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}
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uint32_t timing_freq_get_mhz(void)
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{
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return (uint32_t)(timing_freq_get() / 1000000);
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}

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