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boards: renesas: Add support Renesas mck_ra8t2 board
Add support Renesas mck_ra8t2 board Signed-off-by: Khoa Tran <[email protected]>
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‎boards/renesas/mck_ra8t2/Kconfig.mck_ra8t2‎

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# Copyright (c) 2025 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_MCK_RA8T2
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select SOC_R7KA8T2LFECAC_CM85 if BOARD_MCK_RA8T2_R7KA8T2LFECAC_CM85
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select SOC_R7KA8T2LFECAC_CM33 if BOARD_MCK_RA8T2_R7KA8T2LFECAC_CM33

‎boards/renesas/mck_ra8t2/board.cmake‎

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# Copyright (c) 2025 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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if(CONFIG_SOC_R7KA8T2LFECAC_CM85)
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board_runner_args(jlink "--device=R7KA8T2LF_CPU0" "--reset-after-load")
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endif()
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board_runner_args(pyocd "--target=R7KA8T2LF")
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

‎boards/renesas/mck_ra8t2/board.yml‎

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board:
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name: mck_ra8t2
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full_name: RA8T2 Motor Control Kit
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vendor: renesas
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socs:
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- name: r7ka8t2lfecac

‎boards/renesas/mck_ra8t2/doc/index.rst‎

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.. zephyr:board:: mck_ra8t2
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Overview
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********
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The MCK-RA8T2 is an Motor Control Kit for Renesas RA8T2 MCU Group which integrates multiple series of software-compatible
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Arm®-based 32-bit cores that share a common set of Renesas peripherals to facilitate design scalability and efficient
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platform-based product development.
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The MCU in this series incorporates a high-performance Arm® Cortex®-M85 core running up to 1 GHz and Arm®
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Cortex®-M33 core running up to 250 MHz with the following features:
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- Up to 1 MB MRAM
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- 2 MB SRAM (256 KB of CM85 TCM RAM, 128 KB CM33 TCM RAM, 1664 KB of user SRAM)
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- Octal Serial Peripheral Interface (OSPI)
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- Layer 3 Ethernet Switch Module (ESWM), USBFS, SD/MMC Host Interface
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- Analog peripherals
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- Security and safety features
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MCK-RA8T2 kit includes the items below:
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- RA8T2 CPU board (`MCB-RA8T2`_)
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- Inverter board (`MCI-LV-1`_)
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- Communication board (`MC-COM`_)
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- Permanent magnet synchronous motors
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- Accessories (cables, standoffs, etc.)
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The specifications of the CPU board are shown below:
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**MCU specifications**
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- A high-performance RA8T2 MCU featuring an Arm® Cortex®-M85 core running up to 1 GHz and an Arm® Cortex®-M33 core
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running up to 250 MHz, offered in a 289-pin BGA package.
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- MRAM/SRAM size: 1MB/2MB
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- MCU input clock: 24MHz (Generate with external crystal oscillator)
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- Power supply: DC 5V, select one way automatically from the below:
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- Power is supplied from compatible inverter board
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- Power is supplied from USB connector
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**Connector**
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- Inverter board connector (2 pair)
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- USB connector for J-Link On-Board
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- USB connector for RA8T2
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- SCI connector for Renesas Motor Workbench communication
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- Through hole for CAN communication
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- 20 pin through hole for Arm debugger
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- Pmod connectors (Type2A + Type3A/6A)
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- User-controllable LED x6, Power LED x1,Ether CAT LED x8
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- MCU reset switch
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- Ether CAT connector
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- MicroSD slot
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- DSMIF
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**Onboard debugger**
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This product has the onboard debugger circuit, J-Link On-Board (hereinafter called “J-Link-OB”). When you write a
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program, open the JP3 and connect the USB connector(CN13) on CPU board to PC with USB cable. J-Link-OB operates as debugger equivalent to J-Link.
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If connecting from flash programing tool (e.g. J-Flash Lite by SEGGER), set the type of debugger (tool) to “J-Link”
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Hardware
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********
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Detailed Hardware features for the RA8T2 MCU group can be found at:
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- The RA8T2 MCU group: `RA8T2 Group User's Manual Hardware`_
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- The MCB-RA8T2 board: `MCB-RA8T2 - User's Manual`_
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Supported Features
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==================
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.. zephyr:board-supported-hw::
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.. note::
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For using SDHC module on MCK-RA8T2, Connect microSD Card to microSD Socket (CN17)
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Programming and Debugging
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*************************
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.. zephyr:board-supported-runners::
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Applications for the ``mck_ra8t2`` board configuration can be
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built, flashed, and debugged in the usual way. See
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:ref:`build_an_application` and :ref:`application_run` for more details on
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building and running.
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Here is an example for the :zephyr:code-sample:`hello_world` application on CM85 core.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: mck_ra8t2/r7ka8t2lfecac/cm85
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:goals: flash
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Open a serial terminal, reset the board (push the reset switch S1), and you should
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see the following message in the terminal:
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.. code-block:: console
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***** Booting Zephyr OS v4.2.0-xxx-xxxxxxxxxxxxx *****
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Hello World! mck_ra8t2/r7ka8t2lfecac/cm85
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Flashing
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========
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Program can be flashed to MCB-RA8T2 via the on-board SEGGER J-Link debugger.
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SEGGER J-link's drivers are available at https://www.segger.com/downloads/jlink/
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To flash the program to board
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1. Connect to J-Link OB via USB port to host PC
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2. Make sure J-Link OB jumper is in default configuration as describe in `MCB-RA8T2 - User's Manual`_
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3. Execute west command
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.. code-block:: console
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west flash -r jlink
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References
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**********
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- `MCK-RA8T2 Website`_
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- `RA8T2 MCU group Website`_
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.. _MCK-RA8T2 Website:
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https://www.renesas.com/en/design-resources/boards-kits/mck-ra8t2
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.. _RA8T2 MCU group Website:
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https://www.renesas.com/en/products/ra8t2
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.. _MCB-RA8T2 - User's Manual:
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https://www.renesas.com/en/document/mat/mcb-ra8t2-users-manual?r=25576094
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.. _RA8T2 Group User's Manual Hardware:
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https://www.renesas.com/en/document/mah/ra8t2-group-users-manual-hardware?r=25575951
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.. _MCB-RA8T2:
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https://www.renesas.com/en/design-resources/boards-kits/mcb-ra8t2
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.. _MCI-LV-1:
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https://www.renesas.com/en/design-resources/boards-kits/mci-lv-1
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.. _MC-COM:
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https://www.renesas.com/en/design-resources/boards-kits/mc-com

‎boards/renesas/mck_ra8t2/doc/mck_ra8t2.webp‎

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‎boards/renesas/mck_ra8t2/mck_ra8t2-pinctrl.dtsi‎

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/*
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* Copyright (c) 2025 Renesas Electronics Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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sci9_default: sci9_default {
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group1 {
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/* tx */
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psels = <RA_PSEL(RA_PSEL_SCI_9, 10, 14)>;
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drive-strength = "medium";
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};
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group2 {
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/* rx */
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psels = <RA_PSEL(RA_PSEL_SCI_9, 10, 12)>;
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};
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};
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sci4_default: sci4_default {
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group1 {
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/* tx */
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psels = <RA_PSEL(RA_PSEL_SCI_4, 4, 15)>;
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drive-strength = "medium";
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};
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group2 {
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/* rx */
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psels = <RA_PSEL(RA_PSEL_SCI_4, 4, 14)>;
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};
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};
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spi0_default: spi0_default {
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group1 {
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/* MISO MOSI RSPCK SSL */
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psels = <RA_PSEL(RA_PSEL_SPI, 6, 9)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 15)>,
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<RA_PSEL(RA_PSEL_SPI, 6, 10)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 13)>;
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};
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};
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sdhc0_default: sdhc0_default {
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group1 {
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psels = <RA_PSEL(RA_PSEL_SDHI, 13, 7)>, /* SDCD */
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<RA_PSEL(RA_PSEL_SDHI, 13, 4)>, /* SDCMD */
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<RA_PSEL(RA_PSEL_SDHI, 13, 3)>, /* SDDATA0 */
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<RA_PSEL(RA_PSEL_SDHI, 13, 2)>, /* SDDATA1 */
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<RA_PSEL(RA_PSEL_SDHI, 13, 1)>, /* SDDATA2 */
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<RA_PSEL(RA_PSEL_SDHI, 1, 11)>, /* SDDATA3 */
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<RA_PSEL(RA_PSEL_SDHI, 13, 6)>; /* SDWP */
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drive-strength = "high";
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};
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group2 {
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psels = <RA_PSEL(RA_PSEL_SDHI, 13, 5)>; /* SDCLK */
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drive-strength = "highspeed-high";
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};
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};
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/omit-if-no-ref/ acmphs_ivref0: acmphs_ivref0 {
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group1 {
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/* IVREF0 */
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psels = <RA_PSEL(RA_PSEL_ACMPHS, 0, 8)>;
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renesas,analog-enable;
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};
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};
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/omit-if-no-ref/ acmphs_ivref1: acmphs_ivref1 {
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group1 {
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/* IVREF1 */
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psels = <RA_PSEL(RA_PSEL_ACMPHS, 0, 9)>;
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renesas,analog-enable;
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};
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};
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/omit-if-no-ref/ acmphs0_ivcmp0: acmphs0_ivcmp0 {
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group1 {
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/* CH0 IVCMP0 */
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psels = <RA_PSEL(RA_PSEL_ACMPHS, 8, 5)>;
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renesas,analog-enable;
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};
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};
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/omit-if-no-ref/ acmphs0_ivcmp2: acmphs0_ivcmp2 {
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group1 {
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/* CH0 IVCMP2 */
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psels = <RA_PSEL(RA_PSEL_ACMPHS, 0, 0)>;
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renesas,analog-enable;
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};
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};
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/omit-if-no-ref/ acmphs0_ivcmp3: acmphs0_ivcmp3 {
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group1 {
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/* CH0 IVCMP3 */
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psels = <RA_PSEL(RA_PSEL_ACMPHS, 0, 1)>;
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renesas,analog-enable;
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};
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};
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/omit-if-no-ref/ acmphs_vcout: acmphs_vcout {
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group1 {
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/* VCOUT */
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psels = <RA_PSEL(RA_PSEL_ACMPHS_VCOUT, 2, 8)>;
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};
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};
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};

‎boards/renesas/mck_ra8t2/mck_ra8t2.dtsi‎

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/*
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* Copyright (c) 2025 Renesas Electronics Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input-event-codes.h>
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#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
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#include "mck_ra8t2-pinctrl.dtsi"
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/ {
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leds {
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compatible = "gpio-leds";
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led1: led1 {
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gpios = <&ioport6 14 GPIO_ACTIVE_LOW>;
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label = "LED1";
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};
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led2: led2 {
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gpios = <&ioporta 15 GPIO_ACTIVE_LOW>;
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label = "LED2";
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};
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led3: led3 {
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gpios = <&ioporta 4 GPIO_ACTIVE_LOW>;
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label = "LED3";
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};
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led4: led4 {
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gpios = <&ioport9 0 GPIO_ACTIVE_LOW>;
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label = "LED4";
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};
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led5: led5 {
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gpios = <&ioport5 9 GPIO_ACTIVE_LOW>;
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label = "LED5";
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};
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led6: led6 {
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gpios = <&ioport5 10 GPIO_ACTIVE_LOW>;
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label = "LED6";
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};
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};
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};
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&xtal {
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clock-frequency = <DT_FREQ_M(24)>;
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mosel = <0>;
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#clock-cells = <0>;
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status = "okay";
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};
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&subclk {
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status = "okay";
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};
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&pll {
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status = "okay";
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pllp: pllp {
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status = "okay";
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};
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pllq: pllq {
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status = "okay";
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};
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pllr: pllr {
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status = "okay";
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};
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};
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&pll2 {
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status = "okay";
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pll2p {
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status = "okay";
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};
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pll2q {
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status = "okay";
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};
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pll2r {
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status = "okay";
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};
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};
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&flash {
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flash0: flash@2000000 {
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compatible = "soc-nv-flash";
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reg = <0x2000000 DT_SIZE_K(1024)>;
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};
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};
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&sciclk {
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status = "okay";
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};
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&ioport5 {
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status = "okay";
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};
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&ioport6 {
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status = "okay";
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};
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&ioport9 {
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status = "okay";
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};
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&ioporta {
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status = "okay";
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};
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&ioportb {
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status = "okay";
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};

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