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dcpleunggalak
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timer: hpet: don't force TIMER_READS_ITS_FREQUENCY_AT_RUNTIME
This allows the HPET timer to use kconfig to specify clock frequency instead of relying on calculation at runtime. When the frequency is known at build, this allow the toolchain to optimize some calculations. Signed-off-by: Daniel Leung <[email protected]>
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+20
-4
lines changed

2 files changed

+20
-4
lines changed

drivers/timer/Kconfig

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -82,7 +82,7 @@ config HPET_TIMER
8282
depends on X86
8383
select IOAPIC if X86
8484
select LOAPIC if X86
85-
select TIMER_READS_ITS_FREQUENCY_AT_RUNTIME
85+
imply TIMER_READS_ITS_FREQUENCY_AT_RUNTIME
8686
select TICKLESS_CAPABLE
8787
help
8888
This option selects High Precision Event Timer (HPET) as a

drivers/timer/hpet.c

Lines changed: 19 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -50,11 +50,22 @@ DEVICE_MMIO_TOPLEVEL_STATIC(hpet_regs, DT_DRV_INST(0));
5050
#define HPET_CMP_MIN_DELAY (1000)
5151
#endif
5252

53+
#define MAX_TICKS 0x7FFFFFFFUL
54+
5355
static __pinned_bss struct k_spinlock lock;
54-
static __pinned_bss unsigned int max_ticks;
55-
static __pinned_bss unsigned int cyc_per_tick;
5656
static __pinned_bss unsigned int last_count;
5757

58+
#ifdef CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME
59+
static __pinned_bss unsigned int cyc_per_tick;
60+
static __pinned_bss unsigned int max_ticks;
61+
#else
62+
#define cyc_per_tick \
63+
(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC / CONFIG_SYS_CLOCK_TICKS_PER_SEC)
64+
65+
#define max_ticks \
66+
((MAX_TICKS - cyc_per_tick) / cyc_per_tick)
67+
#endif /* CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME */
68+
5869
__isr
5970
static void hpet_isr(const void *arg)
6071
{
@@ -124,6 +135,8 @@ int sys_clock_driver_init(const struct device *dev)
124135
uint32_t hz;
125136

126137
ARG_UNUSED(dev);
138+
ARG_UNUSED(hz);
139+
ARG_UNUSED(z_clock_hw_cycles_per_sec);
127140

128141
DEVICE_MMIO_TOPLEVEL_MAP(hpet_regs, K_MEM_CACHE_NONE);
129142

@@ -133,10 +146,14 @@ int sys_clock_driver_init(const struct device *dev)
133146
set_timer0_irq(DT_INST_IRQN(0));
134147
irq_enable(DT_INST_IRQN(0));
135148

149+
#ifdef CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME
136150
hz = (uint32_t)(HPET_COUNTER_CLK_PERIOD / CLK_PERIOD_REG);
137151
z_clock_hw_cycles_per_sec = hz;
138152
cyc_per_tick = hz / CONFIG_SYS_CLOCK_TICKS_PER_SEC;
139153

154+
max_ticks = (MAX_TICKS - cyc_per_tick) / cyc_per_tick;
155+
#endif
156+
140157
/* Note: we set the legacy routing bit, because otherwise
141158
* nothing in Zephyr disables the PIT which then fires
142159
* interrupts into the same IRQ. But that means we're then
@@ -148,7 +165,6 @@ int sys_clock_driver_init(const struct device *dev)
148165
TIMER0_CONF_REG &= ~TCONF_FSB_EN;
149166
TIMER0_CONF_REG |= TCONF_MODE32;
150167

151-
max_ticks = (0x7fffffff - cyc_per_tick) / cyc_per_tick;
152168
last_count = MAIN_COUNTER_REG;
153169

154170
TIMER0_CONF_REG |= TCONF_INT_ENABLE;

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