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arm: mpu: Unify ARM_MPU kconfig definitions
Previously, there were two separate Kconfig definitions of ARM_MPU located at: - arch/arm/core/mpu/Kconfig - arch/arm64/core/cortex_r/Kconfig This lead to incomplete default settings and unexpected missing configurations. This commit combines the two into a single unified definition now located at arch/common/Kconfig to prevent this. Signed-off-by: Samuel Chee <[email protected]>
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arch/arm/core/mpu/Kconfig

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if CPU_HAS_MPU
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config ARM_MPU
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bool "ARM MPU Support"
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select MPU
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select SRAM_REGION_PERMISSIONS
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select THREAD_STACK_INFO
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select ARCH_HAS_EXECUTABLE_PAGE_BIT
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select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if !(CPU_HAS_NXP_SYSMPU || ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R)
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select MPU_REQUIRES_NON_OVERLAPPING_REGIONS if CPU_HAS_ARM_MPU && (ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R)
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select MPU_GAP_FILLING if AARCH32_ARMV8_R
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select ARCH_MEM_DOMAIN_SUPPORTS_ISOLATED_STACKS
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select MEM_DOMAIN_ISOLATED_STACKS
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help
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MCU implements Memory Protection Unit.
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Notes:
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The ARMv6-M and ARMv7-M MPU architecture requires a power-of-two
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alignment of MPU region base address and size.
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The NXP MPU as well as the ARMv8-M MPU do not require MPU regions
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to have power-of-two alignment for base address and region size.
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The ARMv8-M MPU requires the active MPU regions be non-overlapping.
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As a result of this, the ARMv8-M MPU needs to fully partition the
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memory map when programming dynamic memory regions (e.g. PRIV stack
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guard, user thread stack, and application memory domains), if the
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system requires PRIV access policy different from the access policy
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of the ARMv8-M background memory map. The application developer may
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enforce full PRIV (kernel) memory partition by enabling the
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CONFIG_MPU_GAP_FILLING option.
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By not enforcing full partition, MPU may leave part of kernel
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SRAM area covered only by the default ARMv8-M memory map. This
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is fine for User Mode, since the background ARM map does not
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allow nPRIV access at all. However, since the background map
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policy allows instruction fetches by privileged code, forcing
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this Kconfig option off prevents the system from directly
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triggering MemManage exceptions upon accidental attempts to
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execute code from SRAM in XIP builds.
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Since this does not compromise User Mode, we make the skipping
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of full partitioning the default behavior for the ARMv8-M MPU
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driver.
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config ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
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int
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default 256 if ARM_MPU && ARMV6_M_ARMV8_M_BASELINE && !ARMV8_M_BASELINE

arch/arm64/core/cortex_r/Kconfig

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@@ -7,39 +7,6 @@
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if CPU_HAS_MPU
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config ARM_MPU
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bool "ARM MPU Support"
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select THREAD_STACK_INFO
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select MPU
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select SRAM_REGION_PERMISSIONS
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select ARCH_MEM_DOMAIN_SYNCHRONOUS_API if USERSPACE
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default y
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help
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MPU implements Memory Protection Unit.
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Notes:
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The ARMv8-R MPU architecture requires a power-of-two alignment
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of MPU region base address and size(64 bytes aligned).
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The ARMv8-R MPU requires the active MPU regions be non-overlapping.
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As a result of this, the ARMv8-R MPU needs to fully partition the
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memory map when programming dynamic memory regions (e.g. PRIV stack
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guard, user thread stack, and application memory domains), if the
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system requires PRIV access policy different from the access policy
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of the ARMv8-R background memory map. The application developer may
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enforce full PRIV (kernel) memory partition by enabling the
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CONFIG_MPU_GAP_FILLING option.
32-
By not enforcing full partition, MPU may leave part of kernel
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SRAM area covered only by the default ARMv8-R memory map. This
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is fine for User Mode, since the background ARM map does not
35-
allow nPRIV access at all. However, since the background map
36-
policy allows instruction fetches by privileged code, forcing
37-
this Kconfig option off prevents the system from directly
38-
triggering MemManage exceptions upon accidental attempts to
39-
execute code from SRAM in XIP builds.
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Since this does not compromise User Mode, we make the skipping
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of full partitioning the default behavior for the ARMv8-R MPU
42-
driver.
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config ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
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int

arch/common/Kconfig

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Original file line numberDiff line numberDiff line change
@@ -37,3 +37,47 @@ config ISR_TABLE_SHELL
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depends on SHELL
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help
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This option enables a shell command to dump the ISR tables.
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config ARM_MPU
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bool "ARM MPU Support"
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select MPU
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select SRAM_REGION_PERMISSIONS
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select THREAD_STACK_INFO
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select ARCH_HAS_EXECUTABLE_PAGE_BIT if (CPU_AARCH32_CORTEX_R || CPU_CORTEX_M)
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select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if !(CPU_HAS_NXP_SYSMPU || ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R)
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select MPU_REQUIRES_NON_OVERLAPPING_REGIONS if CPU_HAS_ARM_MPU && (ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R)
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select MPU_GAP_FILLING if AARCH32_ARMV8_R
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select ARCH_MEM_DOMAIN_SUPPORTS_ISOLATED_STACKS if (CPU_AARCH32_CORTEX_R || CPU_CORTEX_M)
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select ARCH_MEM_DOMAIN_SYNCHRONOUS_API if USERSPACE && CPU_AARCH64_CORTEX_R
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default y if CPU_AARCH64_CORTEX_R
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depends on CPU_HAS_MPU
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help
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MCU implements Memory Protection Unit.
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58+
Notes:
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The ARMv6-M, ARMv7-M, and ARMv8-R MPU MPU architecture requires a power-of-two
60+
alignment of MPU region base address and size.
61+
62+
The NXP MPU as well as the ARMv8-M MPU do not require MPU regions
63+
to have power-of-two alignment for base address and region size.
64+
65+
The ARMv8-M and ARMv8-R MPU requires the active MPU regions be non-overlapping.
66+
As a result of this, both respective MPUs needs to fully partition the
67+
memory map when programming dynamic memory regions (e.g. PRIV stack
68+
guard, user thread stack, and application memory domains), if the
69+
system requires PRIV access policy different from the access policy
70+
of the ARMv8-M or ARMv8-R background memory map. The application developer may
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enforce full PRIV (kernel) memory partition by enabling the
72+
MPU_GAP_FILLING option.
73+
By not enforcing full partition, MPU may leave part of kernel
74+
SRAM area covered only by the default ARMv8-M or ARMv8-R memory map. This
75+
is fine for User Mode, since the background ARM map does not
76+
allow nPRIV access at all. However, since the background map
77+
policy allows instruction fetches by privileged code, forcing
78+
this Kconfig option off prevents the system from directly
79+
triggering MemManage exceptions upon accidental attempts to
80+
execute code from SRAM in XIP builds.
81+
Since this does not compromise User Mode, we make the skipping
82+
of full partitioning the default behavior for the ARMv8-M and ARMv8-R MPU
83+
driver.

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