drivers: add the ch32v00x systick driver

This commit adds the systick driver for WCH CH32V003.

Signed-off-by: Michael Hope <[email protected]>
Signed-off-by: Dhiru Kholia <[email protected]>

Author: nzmichaelh

drivers/timer/CMakeLists.txt

@@ -11,6 +11,7 @@ zephyr_library_sources_ifdef(CONFIG_ARCV2_TIMER arcv2_timer0.c)
 zephyr_library_sources_ifdef(CONFIG_ARM_ARCH_TIMER arm_arch_timer.c)
 zephyr_library_sources_ifdef(CONFIG_INTEL_ADSP_TIMER intel_adsp_timer.c)
 zephyr_library_sources_ifdef(CONFIG_CC13XX_CC26XX_RTC_TIMER cc13xx_cc26xx_rtc_timer.c)
+zephyr_library_sources_ifdef(CONFIG_CH32V00X_SYSTICK wch_systick_ch32v00x.c)
 zephyr_library_sources_ifdef(CONFIG_CORTEX_M_SYSTICK cortex_m_systick.c)
 zephyr_library_sources_ifdef(CONFIG_ESP32_SYS_TIMER esp32_sys_timer.c)
 zephyr_library_sources_ifdef(CONFIG_GECKO_BURTC_TIMER gecko_burtc_timer.c)

drivers/timer/Kconfig

@@ -70,6 +70,7 @@ source "drivers/timer/Kconfig.arcv2"
 source "drivers/timer/Kconfig.arm_arch"
 source "drivers/timer/Kconfig.cavs"
 source "drivers/timer/Kconfig.cc13xx_cc26xx_rtc"
+source "drivers/timer/Kconfig.wch_ch32v00x"
 source "drivers/timer/Kconfig.cortex_m_systick"
 source "drivers/timer/Kconfig.esp32"
 source "drivers/timer/Kconfig.gecko"

drivers/timer/Kconfig.wch_ch32v00x

@@ -0,0 +1,8 @@
+# Copyright (c) 2024 Michael Hope
+# SPDX-License-Identifier: Apache-2.0
+
+config CH32V00X_SYSTICK
+	bool "CH32V00X systick timer"
+	depends on SOC_CH32V003
+	default y
+	depends on DT_HAS_WCH_SYSTICK_ENABLED

drivers/timer/wch_systick_ch32v00x.c

@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2024 Michael Hope
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#define DT_DRV_COMPAT wch_systick
+
+#include <soc.h>
+#include <zephyr/device.h>
+#include <zephyr/drivers/timer/system_timer.h>
+#include <zephyr/irq.h>
+#include <zephyr/kernel.h>
+#include <zephyr/sys/util.h>
+
+#include <ch32_systick.h>
+
+#define STK_SWIE  BIT(31)
+#define STK_STRE  BIT(3)
+#define STK_STCLK BIT(2)
+#define STK_STIE  BIT(1)
+#define STK_STE   BIT(0)
+
+#define STK_CNTIF BIT(0)
+
+#define CYCLES_PER_SEC  sys_clock_hw_cycles_per_sec()
+#define CYCLES_PER_TICK (CYCLES_PER_SEC / CONFIG_SYS_CLOCK_TICKS_PER_SEC)
+
+#define SYSTICK ((SysTick_Type *)(DT_INST_REG_ADDR(0)))
+
+struct ch32v00x_systick_device {
+};
+
+static volatile uint32_t ch32v00x_systick_count;
+
+static void ch32v00x_systick_irq(const struct ch32v00x_systick_device *unused)
+{
+	ARG_UNUSED(unused);
+
+	SYSTICK->SR = 0;
+	ch32v00x_systick_count += CYCLES_PER_TICK; /* Track cycles. */
+	sys_clock_announce(1);                     /* Poke the scheduler. */
+}
+
+uint32_t sys_clock_cycle_get_32(void)
+{
+	return ch32v00x_systick_count + SYSTICK->CNT;
+}
+
+uint32_t sys_clock_elapsed(void)
+{
+	return 0;
+}
+
+static int ch32v00x_systick_init(void)
+{
+	IRQ_CONNECT(DT_INST_IRQN(0), 0, ch32v00x_systick_irq, NULL, 0);
+
+	SYSTICK->SR = 0;
+	SYSTICK->CMP = CYCLES_PER_TICK;
+	SYSTICK->CNT = 0;
+	SYSTICK->CTLR = STK_STRE | STK_STCLK | STK_STIE | STK_STE;
+
+	irq_enable(DT_INST_IRQN(0));
+
+	return 0;
+}
+
+SYS_INIT(ch32v00x_systick_init, PRE_KERNEL_2, CONFIG_SYSTEM_CLOCK_INIT_PRIORITY);

dts/bindings/timer/wch,systick.yaml

@@ -0,0 +1,15 @@
+# Copyright (c) 2024 Michael Hope
+# SPDX-License-Identifier: Apache-2.0
+
+description: WCH CH32V00x Systick
+
+compatible: "wch,systick"
+
+include: base.yaml
+
+properties:
+  reg:
+    required: true
+
+  interrupts:
+    required: true

modules/hal_wch/ch32_systick.h

@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2024 Dhiru Kholia
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef _CH32_SYSTICK_H
+#define _CH32_SYSTICK_H
+
+#ifdef CONFIG_SOC_CH32V003
+#include <ch32v003fun.h>
+#else
+#error "SoC not supported!"
+#endif
+
+#endif