@@ -73,6 +73,12 @@ static const struct device *eth_stm32_phy_dev = DEVICE_PHY_BY_NAME(0);
7373#define IS_ETH_DMATXDESC_OWN (dma_tx_desc ) (dma_tx_desc->DESC3 & \
7474 ETH_DMATXNDESCRF_OWN)
7575
76+ #define ETH_RXBUFNB ETH_RX_DESC_CNT
77+ #define ETH_TXBUFNB ETH_TX_DESC_CNT
78+
79+ #define ETH_MEDIA_INTERFACE_MII HAL_ETH_MII_MODE
80+ #define ETH_MEDIA_INTERFACE_RMII HAL_ETH_RMII_MODE
81+
7682/* Only one tx_buffer is sufficient to pass only 1 dma_buffer */
7783#define ETH_TXBUF_DEF_NB 1U
7884#else
@@ -99,14 +105,14 @@ static const struct device *eth_stm32_phy_dev = DEVICE_PHY_BY_NAME(0);
99105#define __eth_stm32_buf __aligned(4)
100106#endif
101107
102- static ETH_DMADescTypeDef dma_rx_desc_tab [ETH_RX_DESC_CNT ] __eth_stm32_desc ;
103- static ETH_DMADescTypeDef dma_tx_desc_tab [ETH_TX_DESC_CNT ] __eth_stm32_desc ;
104- static uint8_t dma_rx_buffer [ETH_RX_DESC_CNT ][ ETH_MAX_PACKET_SIZE ] __eth_stm32_buf ;
105- static uint8_t dma_tx_buffer [ETH_TX_DESC_CNT ][ ETH_MAX_PACKET_SIZE ] __eth_stm32_buf ;
108+ static ETH_DMADescTypeDef dma_rx_desc_tab [ETH_RXBUFNB ] __eth_stm32_desc ;
109+ static ETH_DMADescTypeDef dma_tx_desc_tab [ETH_TXBUFNB ] __eth_stm32_desc ;
110+ static uint8_t dma_rx_buffer [ETH_RXBUFNB ][ ETH_STM32_RX_BUF_SIZE ] __eth_stm32_buf ;
111+ static uint8_t dma_tx_buffer [ETH_TXBUFNB ][ ETH_STM32_TX_BUF_SIZE ] __eth_stm32_buf ;
106112
107113#if defined(CONFIG_ETH_STM32_HAL_API_V2 )
108114
109- BUILD_ASSERT (ETH_MAX_PACKET_SIZE % 4 == 0 , "Rx buffer size must be a multiple of 4" );
115+ BUILD_ASSERT (ETH_STM32_RX_BUF_SIZE % 4 == 0 , "Rx buffer size must be a multiple of 4" );
110116
111117struct eth_stm32_rx_buffer_header {
112118 struct eth_stm32_rx_buffer_header * next ;
@@ -125,13 +131,13 @@ struct eth_stm32_tx_context {
125131 bool used ;
126132};
127133
128- static struct eth_stm32_rx_buffer_header dma_rx_buffer_header [ETH_RX_DESC_CNT ];
129- static struct eth_stm32_tx_buffer_header dma_tx_buffer_header [ETH_TX_DESC_CNT ];
134+ static struct eth_stm32_rx_buffer_header dma_rx_buffer_header [ETH_RXBUFNB ];
135+ static struct eth_stm32_tx_buffer_header dma_tx_buffer_header [ETH_TXBUFNB ];
130136static struct eth_stm32_tx_context dma_tx_context [ETH_TX_DESC_CNT ];
131137
132138void HAL_ETH_RxAllocateCallback (uint8_t * * buf )
133139{
134- for (size_t i = 0 ; i < ETH_RX_DESC_CNT ; ++ i ) {
140+ for (size_t i = 0 ; i < ETH_RXBUFNB ; ++ i ) {
135141 if (!dma_rx_buffer_header [i ].used ) {
136142 dma_rx_buffer_header [i ].next = NULL ;
137143 dma_rx_buffer_header [i ].size = 0 ;
@@ -143,8 +149,8 @@ void HAL_ETH_RxAllocateCallback(uint8_t **buf)
143149 * buf = NULL ;
144150}
145151
146- /* Pointer to an array of ETH_MAX_PACKET_SIZE uint8_t's */
147- typedef uint8_t (* RxBufferPtr )[ETH_MAX_PACKET_SIZE ];
152+ /* Pointer to an array of ETH_STM32_RX_BUF_SIZE uint8_t's */
153+ typedef uint8_t (* RxBufferPtr )[ETH_STM32_RX_BUF_SIZE ];
148154
149155/* called by HAL_ETH_ReadData() */
150156void HAL_ETH_RxLinkCallback (void * * pStart , void * * pEnd , uint8_t * buff , uint16_t Length )
@@ -155,7 +161,7 @@ void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t
155161 size_t index = (RxBufferPtr )buff - & dma_rx_buffer [0 ];
156162 struct eth_stm32_rx_buffer_header * header = & dma_rx_buffer_header [index ];
157163
158- __ASSERT_NO_MSG (index < ETH_RX_DESC_CNT );
164+ __ASSERT_NO_MSG (index < ETH_RXBUFNB );
159165
160166 header -> size = Length ;
161167
@@ -197,7 +203,7 @@ void HAL_ETH_TxFreeCallback(uint32_t *buff)
197203static inline uint16_t allocate_tx_buffer (void )
198204{
199205 for (;;) {
200- for (uint16_t index = 0 ; index < ETH_TX_DESC_CNT ; index ++ ) {
206+ for (uint16_t index = 0 ; index < ETH_TXBUFNB ; index ++ ) {
201207 if (!dma_tx_buffer_header [index ].used ) {
202208 dma_tx_buffer_header [index ].used = true;
203209 return index ;
@@ -342,7 +348,7 @@ static int eth_tx(const struct device *dev, struct net_pkt *pkt)
342348 heth = & dev_data -> heth ;
343349
344350 total_len = net_pkt_get_len (pkt );
345- if (total_len > (ETH_MAX_PACKET_SIZE * ETH_TX_DESC_CNT )) {
351+ if (total_len > (ETH_STM32_TX_BUF_SIZE * ETH_TXBUFNB )) {
346352 LOG_ERR ("PKT too big" );
347353 return - EIO ;
348354 }
@@ -375,19 +381,19 @@ static int eth_tx(const struct device *dev, struct net_pkt *pkt)
375381#if defined(CONFIG_ETH_STM32_HAL_API_V2 )
376382 remaining_read = total_len ;
377383 /* fill and allocate buffer until remaining data fits in one buffer */
378- while (remaining_read > ETH_MAX_PACKET_SIZE ) {
379- if (net_pkt_read (pkt , buf_header -> tx_buff .buffer , ETH_MAX_PACKET_SIZE )) {
384+ while (remaining_read > ETH_STM32_TX_BUF_SIZE ) {
385+ if (net_pkt_read (pkt , buf_header -> tx_buff .buffer , ETH_STM32_TX_BUF_SIZE )) {
380386 res = - ENOBUFS ;
381387 goto error ;
382388 }
383389 const uint16_t next_buffer_id = allocate_tx_buffer ();
384390
385- buf_header -> tx_buff .len = ETH_MAX_PACKET_SIZE ;
391+ buf_header -> tx_buff .len = ETH_STM32_TX_BUF_SIZE ;
386392 /* append new buffer to the linked list */
387393 buf_header -> tx_buff .next = & dma_tx_buffer_header [next_buffer_id ].tx_buff ;
388394 /* and adjust tail pointer */
389395 buf_header = & dma_tx_buffer_header [next_buffer_id ];
390- remaining_read -= ETH_MAX_PACKET_SIZE ;
396+ remaining_read -= ETH_STM32_TX_BUF_SIZE ;
391397 }
392398 if (net_pkt_read (pkt , buf_header -> tx_buff .buffer , remaining_read )) {
393399 res = - ENOBUFS ;
@@ -626,7 +632,7 @@ static struct net_pkt *eth_rx(const struct device *dev)
626632 rx_header ; rx_header = rx_header -> next ) {
627633 const size_t index = rx_header - & dma_rx_buffer_header [0 ];
628634
629- __ASSERT_NO_MSG (index < ETH_RX_DESC_CNT );
635+ __ASSERT_NO_MSG (index < ETH_RXBUFNB );
630636 if (net_pkt_write (pkt , dma_rx_buffer [index ], rx_header -> size )) {
631637 LOG_ERR ("Failed to append RX buffer to context buffer" );
632638 net_pkt_unref (pkt );
@@ -963,7 +969,7 @@ static int eth_initialize(const struct device *dev)
963969#if defined(CONFIG_ETH_STM32_HAL_API_V2 )
964970 heth -> Init .TxDesc = dma_tx_desc_tab ;
965971 heth -> Init .RxDesc = dma_rx_desc_tab ;
966- heth -> Init .RxBuffLen = ETH_MAX_PACKET_SIZE ;
972+ heth -> Init .RxBuffLen = ETH_STM32_RX_BUF_SIZE ;
967973#endif /* CONFIG_ETH_STM32_HAL_API_V2 */
968974
969975 hal_ret = HAL_ETH_Init (heth );
@@ -1029,16 +1035,16 @@ static int eth_initialize(const struct device *dev)
10291035#if defined(CONFIG_ETH_STM32_HAL_API_V2 )
10301036
10311037 /* prepare tx buffer header */
1032- for (uint16_t i = 0 ; i < ETH_TX_DESC_CNT ; ++ i ) {
1038+ for (uint16_t i = 0 ; i < ETH_TXBUFNB ; ++ i ) {
10331039 dma_tx_buffer_header [i ].tx_buff .buffer = dma_tx_buffer [i ];
10341040 }
10351041
10361042 hal_ret = HAL_ETH_Start_IT (heth );
10371043#else
10381044 HAL_ETH_DMATxDescListInit (heth , dma_tx_desc_tab ,
1039- & dma_tx_buffer [0 ][0 ], ETH_TX_DESC_CNT );
1045+ & dma_tx_buffer [0 ][0 ], ETH_TXBUFNB );
10401046 HAL_ETH_DMARxDescListInit (heth , dma_rx_desc_tab ,
1041- & dma_rx_buffer [0 ][0 ], ETH_RX_DESC_CNT );
1047+ & dma_rx_buffer [0 ][0 ], ETH_RXBUFNB );
10421048
10431049 hal_ret = HAL_ETH_Start (heth );
10441050#endif /* CONFIG_ETH_STM32_HAL_API_V2 */
@@ -1325,14 +1331,14 @@ static struct eth_stm32_hal_dev_data eth0_data = {
13251331 ETH_CHECKSUM_BY_HARDWARE : ETH_CHECKSUM_BY_SOFTWARE ,
13261332#endif /* !CONFIG_SOC_SERIES_STM32H7X */
13271333 .MediaInterface = IS_ENABLED (CONFIG_ETH_STM32_HAL_MII ) ?
1328- HAL_ETH_MII_MODE : HAL_ETH_RMII_MODE ,
1334+ ETH_MEDIA_INTERFACE_MII : ETH_MEDIA_INTERFACE_RMII ,
13291335 },
13301336 },
13311337};
13321338
13331339ETH_NET_DEVICE_DT_INST_DEFINE (0 , eth_initialize ,
13341340 NULL , & eth0_data , & eth0_config ,
1335- CONFIG_ETH_INIT_PRIORITY , & eth_api , NET_ETH_MTU );
1341+ CONFIG_ETH_INIT_PRIORITY , & eth_api , ETH_STM32_HAL_MTU );
13361342
13371343#if defined(CONFIG_PTP_CLOCK_STM32_HAL )
13381344
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