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drivers: serial: gd32 usart parity bit config
Initialize parity bit(Default NONE) from DTS. Signed-off-by: HaiLong Yang <[email protected]>
1 parent 98d2d2f commit db8ddef

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+30
-3
lines changed

1 file changed

+30
-3
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drivers/serial/usart_gd32.c

Lines changed: 30 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -5,13 +5,15 @@
55

66
#define DT_DRV_COMPAT gd_gd32_usart
77

8+
#include <errno.h>
89
#include <drivers/pinctrl.h>
910
#include <drivers/uart.h>
1011

1112
struct gd32_usart_config {
1213
uint32_t reg;
1314
uint32_t rcu_periph_clock;
1415
const struct pinctrl_dev_config *pcfg;
16+
uint32_t parity;
1517
};
1618

1719
struct gd32_usart_data {
@@ -22,20 +24,43 @@ static int usart_gd32_init(const struct device *dev)
2224
{
2325
const struct gd32_usart_config *const cfg = dev->config;
2426
struct gd32_usart_data *const data = dev->data;
27+
uint32_t word_length;
28+
uint32_t parity;
2529
int ret;
2630

2731
ret = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);
2832
if (ret < 0) {
2933
return ret;
3034
}
3135

36+
/**
37+
* In order to keep the transfer data size to 8 bits(1 byte),
38+
* append word length to 9BIT if parity bit enabled.
39+
*/
40+
switch (cfg->parity) {
41+
case UART_CFG_PARITY_NONE:
42+
parity = USART_PM_NONE;
43+
word_length = USART_WL_8BIT;
44+
break;
45+
case UART_CFG_PARITY_ODD:
46+
parity = USART_PM_ODD;
47+
word_length = USART_WL_9BIT;
48+
break;
49+
case UART_CFG_PARITY_EVEN:
50+
parity = USART_PM_EVEN;
51+
word_length = USART_WL_9BIT;
52+
break;
53+
default:
54+
return -ENOTSUP;
55+
}
56+
3257
rcu_periph_clock_enable(cfg->rcu_periph_clock);
3358
usart_deinit(cfg->reg);
3459
usart_baudrate_set(cfg->reg, data->baud_rate);
35-
usart_word_length_set(cfg->reg, USART_WL_8BIT);
36-
usart_parity_config(cfg->reg, USART_PM_NONE);
60+
usart_parity_config(cfg->reg, parity);
61+
usart_word_length_set(cfg->reg, word_length);
62+
/* Default to 1 stop bit */
3763
usart_stop_bit_set(cfg->reg, USART_STB_1BIT);
38-
usart_parity_config(cfg->reg, USART_PM_NONE);
3964
usart_receive_config(cfg->reg, USART_RECEIVE_ENABLE);
4065
usart_transmit_config(cfg->reg, USART_TRANSMIT_ENABLE);
4166
usart_enable(cfg->reg);
@@ -114,6 +139,8 @@ static const struct uart_driver_api usart_gd32_driver_api = {
114139
.reg = DT_INST_REG_ADDR(n), \
115140
.rcu_periph_clock = DT_INST_PROP(n, rcu_periph_clock), \
116141
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
142+
.parity = DT_ENUM_IDX_OR(DT_DRV_INST(n), parity, \
143+
UART_CFG_PARITY_NONE), \
117144
}; \
118145
DEVICE_DT_INST_DEFINE(n, &usart_gd32_init, \
119146
NULL, \

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