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drivers: ethernet: stm32: Add generic helper functions
This commit introduces helper functions to avoid having large #if DT_HAS_COMPAT_STATUS_OKAY ... #else blocks, improving readability. Signed-off-by: Julien Racki <[email protected]>
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2 files changed

+116
-86
lines changed

2 files changed

+116
-86
lines changed

‎drivers/ethernet/eth_stm32_hal_ptp.c‎

Lines changed: 72 additions & 54 deletions
Original file line numberDiff line numberDiff line change
@@ -212,6 +212,72 @@ static int ptp_clock_stm32_rate_adjust(const struct device *dev, double ratio)
212212
return ret;
213213
}
214214

215+
static void eth_stm32_ptp_enable_timestamping(ETH_HandleTypeDef *heth)
216+
{
217+
/* Mask the Timestamp Trigger interrupt and enable timestamping */
218+
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet)
219+
heth->Instance->MACIER &= ~(ETH_MACIER_TSIE);
220+
heth->Instance->MACTSCR |= ETH_MACTSCR_TSENA;
221+
#else
222+
heth->Instance->MACIMR &= ~(ETH_MACIMR_TSTIM);
223+
heth->Instance->PTPTSCR |= ETH_PTPTSCR_TSE;
224+
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
225+
}
226+
227+
static void eth_stm32_ptp_set_addend(ETH_HandleTypeDef *heth, uint32_t addend_val)
228+
{
229+
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet)
230+
heth->Instance->MACTSAR = addend_val;
231+
heth->Instance->MACTSCR |= ETH_MACTSCR_TSADDREG;
232+
while (heth->Instance->MACTSCR & ETH_MACTSCR_TSADDREG_Msk) {
233+
k_yield();
234+
}
235+
#else
236+
heth->Instance->PTPTSAR = addend_val;
237+
heth->Instance->PTPTSCR |= ETH_PTPTSCR_TSARU;
238+
while (heth->Instance->PTPTSCR & ETH_PTPTSCR_TSARU_Msk) {
239+
k_yield();
240+
}
241+
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
242+
}
243+
244+
static void eth_stm32_ptp_enable_fine_timestamp_update(ETH_HandleTypeDef *heth)
245+
{
246+
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet)
247+
heth->Instance->MACTSCR |= ETH_MACTSCR_TSCFUPDT;
248+
#else
249+
heth->Instance->PTPTSCR |= ETH_PTPTSCR_TSFCU;
250+
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
251+
}
252+
253+
static void eth_stm32_ptp_enable_nsec_rollover(ETH_HandleTypeDef *heth)
254+
{
255+
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet)
256+
heth->Instance->MACTSCR |= ETH_MACTSCR_TSCTRLSSR;
257+
#else
258+
heth->Instance->PTPTSCR |= ETH_PTPTSCR_TSSSR;
259+
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
260+
}
261+
262+
static void eth_stm32_ptp_init_timestamp(ETH_HandleTypeDef *heth)
263+
{
264+
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet)
265+
heth->Instance->MACSTSUR = 0;
266+
heth->Instance->MACSTNUR = 0;
267+
heth->Instance->MACTSCR |= ETH_MACTSCR_TSINIT;
268+
while (heth->Instance->MACTSCR & ETH_MACTSCR_TSINIT_Msk) {
269+
k_yield();
270+
}
271+
#else
272+
heth->Instance->PTPTSHUR = 0;
273+
heth->Instance->PTPTSLUR = 0;
274+
heth->Instance->PTPTSCR |= ETH_PTPTSCR_TSSTI;
275+
while (heth->Instance->PTPTSCR & ETH_PTPTSCR_TSSTI_Msk) {
276+
k_yield();
277+
}
278+
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
279+
}
280+
215281
static DEVICE_API(ptp_clock, api) = {
216282
.set = ptp_clock_stm32_set,
217283
.get = ptp_clock_stm32_get,
@@ -234,19 +300,7 @@ static int ptp_stm32_init(const struct device *port)
234300
eth_dev_data->ptp_clock = port;
235301
ptp_context->eth_dev_data = eth_dev_data;
236302

237-
/* Mask the Timestamp Trigger interrupt */
238-
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet)
239-
heth->Instance->MACIER &= ~(ETH_MACIER_TSIE);
240-
#else
241-
heth->Instance->MACIMR &= ~(ETH_MACIMR_TSTIM);
242-
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
243-
244-
/* Enable timestamping */
245-
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet)
246-
heth->Instance->MACTSCR |= ETH_MACTSCR_TSENA;
247-
#else
248-
heth->Instance->PTPTSCR |= ETH_PTPTSCR_TSE;
249-
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
303+
eth_stm32_ptp_enable_timestamping(heth);
250304

251305
/* Query ethernet clock rate */
252306
ret = clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
@@ -288,50 +342,14 @@ static int ptp_stm32_init(const struct device *port)
288342
*/
289343
addend_val =
290344
UINT32_MAX * eth_dev_data->clk_ratio;
291-
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet)
292-
heth->Instance->MACTSAR = addend_val;
293-
heth->Instance->MACTSCR |= ETH_MACTSCR_TSADDREG;
294-
while (heth->Instance->MACTSCR & ETH_MACTSCR_TSADDREG_Msk) {
295-
k_yield();
296-
}
297-
#else
298-
heth->Instance->PTPTSAR = addend_val;
299-
heth->Instance->PTPTSCR |= ETH_PTPTSCR_TSARU;
300-
while (heth->Instance->PTPTSCR & ETH_PTPTSCR_TSARU_Msk) {
301-
k_yield();
302-
}
303-
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
304345

305-
/* Enable fine timestamp correction method */
306-
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet)
307-
heth->Instance->MACTSCR |= ETH_MACTSCR_TSCFUPDT;
308-
#else
309-
heth->Instance->PTPTSCR |= ETH_PTPTSCR_TSFCU;
310-
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
346+
eth_stm32_ptp_set_addend(heth, addend_val);
311347

312-
/* Enable nanosecond rollover into a new second */
313-
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet)
314-
heth->Instance->MACTSCR |= ETH_MACTSCR_TSCTRLSSR;
315-
#else
316-
heth->Instance->PTPTSCR |= ETH_PTPTSCR_TSSSR;
317-
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
348+
eth_stm32_ptp_enable_fine_timestamp_update(heth);
318349

319-
/* Initialize timestamp */
320-
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet)
321-
heth->Instance->MACSTSUR = 0;
322-
heth->Instance->MACSTNUR = 0;
323-
heth->Instance->MACTSCR |= ETH_MACTSCR_TSINIT;
324-
while (heth->Instance->MACTSCR & ETH_MACTSCR_TSINIT_Msk) {
325-
k_yield();
326-
}
327-
#else
328-
heth->Instance->PTPTSHUR = 0;
329-
heth->Instance->PTPTSLUR = 0;
330-
heth->Instance->PTPTSCR |= ETH_PTPTSCR_TSSTI;
331-
while (heth->Instance->PTPTSCR & ETH_PTPTSCR_TSSTI_Msk) {
332-
k_yield();
333-
}
334-
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
350+
eth_stm32_ptp_enable_nsec_rollover(heth);
351+
352+
eth_stm32_ptp_init_timestamp(heth);
335353

336354
/* Set PTP Configuration done */
337355
heth->IsPtpConfigured = ETH_STM32_PTP_CONFIGURED;

‎drivers/ethernet/eth_stm32_hal_v2.c‎

Lines changed: 44 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -490,6 +490,47 @@ void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *heth_handle)
490490

491491
}
492492

493+
#if defined(CONFIG_NET_STATISTICS_ETHERNET)
494+
static void eth_stm32_update_dma_error(struct eth_stm32_hal_dev_data *dev_data, uint32_t dma_error)
495+
{
496+
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet)
497+
if ((dma_error & ETH_DMA_RX_WATCHDOG_TIMEOUT_FLAG) ||
498+
(dma_error & ETH_DMA_RX_PROCESS_STOPPED_FLAG) ||
499+
(dma_error & ETH_DMA_RX_BUFFER_UNAVAILABLE_FLAG)) {
500+
eth_stats_update_errors_rx(dev_data->iface);
501+
}
502+
if ((dma_error & ETH_DMA_EARLY_TX_IT_FLAG) ||
503+
(dma_error & ETH_DMA_TX_PROCESS_STOPPED_FLAG)) {
504+
eth_stats_update_errors_tx(dev_data->iface);
505+
}
506+
#else
507+
if ((dma_error & ETH_DMASR_RWTS) || (dma_error & ETH_DMASR_RPSS) ||
508+
(dma_error & ETH_DMASR_RBUS)) {
509+
eth_stats_update_errors_rx(dev_data->iface);
510+
}
511+
if ((dma_error & ETH_DMASR_ETS) || (dma_error & ETH_DMASR_TPSS) ||
512+
(dma_error & ETH_DMASR_TJTS)) {
513+
eth_stats_update_errors_tx(dev_data->iface);
514+
}
515+
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
516+
}
517+
518+
static void eth_stm32_update_rx_error_details(ETH_HandleTypeDef *heth,
519+
struct eth_stm32_hal_dev_data *dev_data)
520+
{
521+
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32mp13_ethernet)
522+
dev_data->stats.error_details.rx_crc_errors = heth->Instance->MMCRXCRCEPR;
523+
dev_data->stats.error_details.rx_align_errors = heth->Instance->MMCRXAEPR;
524+
#elif DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet)
525+
dev_data->stats.error_details.rx_crc_errors = heth->Instance->MMCRCRCEPR;
526+
dev_data->stats.error_details.rx_align_errors = heth->Instance->MMCRAEPR;
527+
#else
528+
dev_data->stats.error_details.rx_crc_errors = heth->Instance->MMCRFCECR;
529+
dev_data->stats.error_details.rx_align_errors = heth->Instance->MMCRFAECR;
530+
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32mp13_ethernet) */
531+
}
532+
#endif /* CONFIG_NET_STATISTICS_ETHERNET */
533+
493534
void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth)
494535
{
495536
/* Do not log errors. If errors are reported due to high traffic,
@@ -516,28 +557,8 @@ void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth)
516557
#endif
517558
dma_error = HAL_ETH_GetDMAError(heth);
518559

519-
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet)
520-
if ((dma_error & ETH_DMA_RX_WATCHDOG_TIMEOUT_FLAG) ||
521-
(dma_error & ETH_DMA_RX_PROCESS_STOPPED_FLAG) ||
522-
(dma_error & ETH_DMA_RX_BUFFER_UNAVAILABLE_FLAG)) {
523-
eth_stats_update_errors_rx(dev_data->iface);
524-
}
525-
if ((dma_error & ETH_DMA_EARLY_TX_IT_FLAG) ||
526-
(dma_error & ETH_DMA_TX_PROCESS_STOPPED_FLAG)) {
527-
eth_stats_update_errors_tx(dev_data->iface);
528-
}
529-
#else
530-
if ((dma_error & ETH_DMASR_RWTS) ||
531-
(dma_error & ETH_DMASR_RPSS) ||
532-
(dma_error & ETH_DMASR_RBUS)) {
533-
eth_stats_update_errors_rx(dev_data->iface);
534-
}
535-
if ((dma_error & ETH_DMASR_ETS) ||
536-
(dma_error & ETH_DMASR_TPSS) ||
537-
(dma_error & ETH_DMASR_TJTS)) {
538-
eth_stats_update_errors_tx(dev_data->iface);
539-
}
540-
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
560+
eth_stm32_update_dma_error(dev_data, dma_error);
561+
541562
break;
542563

543564
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet)
@@ -560,16 +581,7 @@ void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth)
560581
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
561582
}
562583

563-
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32mp13_ethernet)
564-
dev_data->stats.error_details.rx_crc_errors = heth->Instance->MMCRXCRCEPR;
565-
dev_data->stats.error_details.rx_align_errors = heth->Instance->MMCRXAEPR;
566-
#elif DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet)
567-
dev_data->stats.error_details.rx_crc_errors = heth->Instance->MMCRCRCEPR;
568-
dev_data->stats.error_details.rx_align_errors = heth->Instance->MMCRAEPR;
569-
#else
570-
dev_data->stats.error_details.rx_crc_errors = heth->Instance->MMCRFCECR;
571-
dev_data->stats.error_details.rx_align_errors = heth->Instance->MMCRFAECR;
572-
#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
584+
eth_stm32_update_rx_error_details(heth, dev_data);
573585

574586
#endif /* CONFIG_NET_STATISTICS_ETHERNET */
575587
}

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