boards: arm: Create unified fvp_base_revc_2xaem board structure

Nicolas Pitre · Nicolas Pitre · commit dcb95739839d · 2025-10-03T07:24:29.000-04:00
Create unified board configuration to replace verbose board naming
with shorter hierarchical structure. This board works with the new
unified fvp_aem SOC series and supports the v8a architecture variant.

This enables board targets like:
- fvp_base_revc_2xaem/v8a (basic ARMv8-A)
- fvp_base_revc_2xaem/v8a/smp (ARMv8-A SMP)
- fvp_base_revc_2xaem/v8a/smp/ns (ARMv8-A SMP non-secure)

The structure replaces the existing overly verbose board with a cleaner,
more maintainable organization and provides a foundation for adding v9a
variants.

Signed-off-by: Nicolas Pitre &lt;npitre@baylibre.com&gt;
diff --git a/boards/arm/fvp_base_revc_2xaem/Kconfig b/boards/arm/fvp_base_revc_2xaem/Kconfig
diff --git a/boards/arm/fvp_base_revc_2xaem/Kconfig.defconfig b/boards/arm/fvp_base_revc_2xaem/Kconfig.defconfig
@@ -1,9 +1,9 @@
 # Copyright (c) 2021 Carlo Caione <ccaione@baylibre.com>
 # SPDX-License-Identifier: Apache-2.0
 
-if BOARD_FVP_BASE_REVC_2XAEMV8A
+if BOARD_FVP_BASE_REVC_2XAEM
 
 config BUILD_OUTPUT_BIN
 	default y
 
-endif # BOARD_FVP_BASE_REVC_2XAEMV8A
+endif # BOARD_FVP_BASE_REVC_2XAEM
diff --git a/boards/arm/fvp_base_revc_2xaem/Kconfig.fvp_base_revc_2xaem b/boards/arm/fvp_base_revc_2xaem/Kconfig.fvp_base_revc_2xaem
@@ -1,5 +1,5 @@
 # Copyright (c) 2021 Carlo Caione <ccaione@baylibre.com>
 # SPDX-License-Identifier: Apache-2.0
 
-config BOARD_FVP_BASE_REVC_2XAEMV8A
+config BOARD_FVP_BASE_REVC_2XAEM
 	select SOC_FVP_V8A
diff --git a/boards/arm/fvp_base_revc_2xaem/board.cmake b/boards/arm/fvp_base_revc_2xaem/board.cmake
diff --git a/boards/arm/fvp_base_revc_2xaem/board.yml b/boards/arm/fvp_base_revc_2xaem/board.yml
@@ -0,0 +1,10 @@
+board:
+  name: fvp_base_revc_2xaem
+  full_name: BASE RevC 2xAEM (Architectural Envelope Model) Fixed Virtual Platform
+  vendor: arm
+  socs:
+  - name: v8a
+    variants:
+    - name: smp
+      variants:
+      - name: ns
diff --git a/boards/arm/fvp_base_revc_2xaem/doc/index.rst b/boards/arm/fvp_base_revc_2xaem/doc/index.rst
@@ -1,16 +1,16 @@
-.. _fvp_base_revc_2xaemv8a:
+.. _fvp_base_revc_2xaem:
 
-ARM BASE RevC AEMv8A Fixed Virtual Platforms
-############################################
+ARM BASE RevC 2xAEM Fixed Virtual Platforms
+###########################################
 
 Overview
 ********
 
 This board configuration will use ARM Fixed Virtual Platforms(FVP) to emulate
-a generic Armv8-A 64-bit hardware platform.
+a generic AEM (Architectural Envelope Model) hardware platform supporting both
+ARMv8-A and ARMv9-A architectures.
 
-This configuration provides support for a generic Armv8-A 64-bit CPU and
-these devices:
+This configuration provides support for generic AEM CPUs and these devices:
 
 * GICv3 interrupt controller
 * ARM architected (Generic) timer
@@ -38,6 +38,16 @@ The following hardware features are supported:
 
 The kernel currently does not support other hardware features on this platform.
 
+Board Variants
+==============
+
+The following board targets are available:
+
+* ``fvp_base_revc_2xaem/v8a`` - ARMv8-A (64-bit)
+* ``fvp_base_revc_2xaem/v8a/smp`` - ARMv8-A SMP (4 cores)
+* ``fvp_base_revc_2xaem/v8a/smp/ns`` - ARMv8-A SMP Non-Secure
+* ``fvp_base_revc_2xaem/v9a`` - ARMv9-A (64-bit) [Future]
+
 Devices
 ========
 
@@ -77,12 +87,28 @@ ARM FVP emulated environment, for example, with the :zephyr:code-sample:`synchro
 .. zephyr-app-commands::
    :zephyr-app: samples/synchronization
    :host-os: unix
-   :board: fvp_base_revc_2xaemv8a
+   :board: fvp_base_revc_2xaem/v8a
    :goals: build
 
-This will build an image with the synchronization sample app.
+This will build an image with the synchronization sample app for ARMv8-A.
 Then you can run it with ``west build -t run``.
 
+For SMP variants:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/synchronization
+   :host-os: unix
+   :board: fvp_base_revc_2xaem/v8a/smp
+   :goals: build
+
+For SMP Non-Secure variants with TF-A:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/synchronization
+   :host-os: unix
+   :board: fvp_base_revc_2xaem/v8a/smp/ns
+   :goals: build
+
 Running Zephyr at EL1NS
 ***********************
 
diff --git a/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a.dts b/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a.dts
@@ -10,12 +10,12 @@
 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
 
 / {
-	model = "FVP Base RevC 2xAEMv8A";
+	model = "FVP Base RevC 2xAEM ARMv8-A";
 
 	chosen {
 		/*
 		 * The SRAM node is actually located in the
-		 * DRAM region of the FVP Base RevC 2xAEMv8A.
+		 * DRAM region of the FVP Base RevC 2xAEM.
 		 */
 		zephyr,sram = &dram0;
 		zephyr,flash = &flash0;
diff --git a/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a.yaml b/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a.yaml
@@ -0,0 +1,21 @@
+identifier: fvp_base_revc_2xaem/v8a
+name: FVP Base RevC 2xAEM ARMv8-A
+arch: arm64
+type: sim
+simulation:
+  - name: armfvp
+    exec: FVP_Base_RevC-2xAEMvA
+toolchain:
+  - zephyr
+  - cross-compile
+ram: 2048
+flash: 64
+vendor: arm
+supported:
+  - gpio
+  - uart
+  - smp
+testing:
+  ignore_tags:
+    - net
+    - bluetooth
diff --git a/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a_defconfig b/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a_defconfig
diff --git a/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a_smp.dts b/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a_smp.dts
@@ -0,0 +1,6 @@
+/*
+ * Copyright (c) 2021 Carlo Caione <ccaione@baylibre.com>
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "fvp_base_revc_2xaem_v8a.dts"
diff --git a/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a_smp.yaml b/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a_smp.yaml
@@ -1,8 +1,8 @@
 # Copyright (c) 2025 BayLibre SAS
 # SPDX-License-Identifier: Apache-2.0
 
-identifier: fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp
-name: FVP Emulation FVP_Base_RevC-2xAEMvA (SMP)
+identifier: fvp_base_revc_2xaem/v8a/smp
+name: FVP Base RevC 2xAEM ARMv8-A (SMP)
 arch: arm64
 type: sim
 simulation:
@@ -14,3 +14,11 @@ toolchain:
 ram: 2048
 flash: 64
 vendor: arm
+supported:
+  - gpio
+  - uart
+  - smp
+testing:
+  ignore_tags:
+    - net
+    - bluetooth
diff --git a/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a_smp_defconfig b/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a_smp_defconfig
@@ -1,4 +1,4 @@
-# Copyright (c) 2025 BayLibre SAS
+# Copyright (c) 2021 Carlo Caione <ccaione@baylibre.com>
 # SPDX-License-Identifier: Apache-2.0
 
 CONFIG_THREAD_STACK_INFO=y
@@ -24,6 +24,10 @@ CONFIG_CACHE_MANAGEMENT=y
 CONFIG_TIMEOUT_64BIT=y
 CONFIG_ARM64_SET_VMPIDR_EL2=y
 
+# Enable userspace support for SMP
+CONFIG_USERSPACE=y
+CONFIG_MAX_THREAD_BYTES=3
+
 # CPU control without PSCI
 CONFIG_PM_CPU_OPS_PSCI=n
 CONFIG_PM_CPU_OPS=y
diff --git a/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a_smp_ns.dts b/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a_smp_ns.dts
@@ -3,4 +3,4 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include "fvp_base_revc_2xaemv8a.dts"
+#include "fvp_base_revc_2xaem_v8a.dts"
diff --git a/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a_smp_ns.yaml b/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a_smp_ns.yaml
@@ -1,8 +1,8 @@
 # Copyright (c) 2022 Arm Limited (or its affiliates). All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 
-identifier: fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp/ns
-name: FVP Emulation FVP_Base_RevC-2xAEMvA (SMP)
+identifier: fvp_base_revc_2xaem/v8a/smp/ns
+name: FVP Base RevC 2xAEM ARMv8-A (SMP Non-Secure)
 arch: arm64
 type: sim
 simulation:
@@ -14,3 +14,11 @@ toolchain:
 ram: 2048
 flash: 64
 vendor: arm
+supported:
+  - gpio
+  - uart
+  - smp
+testing:
+  ignore_tags:
+    - net
+    - bluetooth
diff --git a/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a_smp_ns_defconfig b/boards/arm/fvp_base_revc_2xaem/fvp_base_revc_2xaem_v8a_smp_ns_defconfig
diff --git a/boards/arm/fvp_base_revc_2xaemv8a/board.yml b/boards/arm/fvp_base_revc_2xaemv8a/board.yml
diff --git a/boards/arm/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a.yaml b/boards/arm/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a.yaml
diff --git a/boards/arm/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a_fvp_base_revc_2xaemv8a_smp.dts b/boards/arm/fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a_fvp_base_revc_2xaemv8a_smp.dts
diff --git a/doc/releases/release-notes-4.3.rst b/doc/releases/release-notes-4.3.rst
@@ -102,6 +102,16 @@ New APIs and options
     * :c:func:`z_arm_save_mpu_context` / :c:func:`z_arm_restore_mpu_context`
     * Existing :c:func:`z_arm_save_fp_context` and :c:func:`z_arm_save_fp_context` have also been updated
 
+  * ARM64
+
+    * The following boardtargets have been renamed:
+
+      * fvp_base_revc_2xaemv8a → fvp_base_revc_2xaem/v8a
+      * fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp
+        → fvp_base_revc_2xaem/v8a/smp
+      * fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp/ns
+        → fvp_base_revc_2xaem/v8a/smp/ns
+
 * Bluetooth
 
   * Audio
diff --git a/samples/net/dhcpv4_client/README.rst b/samples/net/dhcpv4_client/README.rst
@@ -196,7 +196,7 @@ Arm FVP
 ========
 
 * :zephyr:board:`fvp_baser_aemv8r`
-* :ref:`fvp_base_revc_2xaemv8a`
+* :ref:`fvp_base_revc_2xaem`
 
 This sample application running on Arm FVP board can negotiate IP
 address from DHCPv4 server running on Arm FVP, so there is no extra
diff --git a/tests/arch/arm64/arm64_gicv3_its/testcase.yaml b/tests/arch/arm64/arm64_gicv3_its/testcase.yaml
@@ -1,5 +1,5 @@
 tests:
   arch.arm64.gicv3_its:
     build_only: true
-    platform_allow: fvp_base_revc_2xaemv8a
+    platform_allow: fvp_base_revc_2xaem/v8a
     skip: true
diff --git a/tests/arch/arm64/arm64_smc_call/testcase.yaml b/tests/arch/arm64/arm64_smc_call/testcase.yaml
@@ -1,6 +1,6 @@
 tests:
   arch.arm64.smc_call.smc:
-    platform_allow: fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp/ns
+    platform_allow: fvp_base_revc_2xaem/v8a/smp/ns
     tags:
       - arm
       - smc
diff --git a/tests/kernel/mem_protect/syscalls/src/main.c b/tests/kernel/mem_protect/syscalls/src/main.c
@@ -13,7 +13,7 @@
 
 #define BUF_SIZE	32
 
-#if defined(CONFIG_BOARD_FVP_BASE_REVC_2XAEMV8A)
+#if defined(CONFIG_BOARD_FVP_BASE_REVC_2XAEM)
 #define SLEEP_MS_LONG	30000
 #elif defined(CONFIG_BOARD_INTEL_ADSP_ACE30_PTL_SIM) ||                                            \
 	defined(CONFIG_BOARD_INTEL_ADSP_ACE40_NVL_SIM)
diff --git a/tests/subsys/zbus/dyn_channel/testcase.yaml b/tests/subsys/zbus/dyn_channel/testcase.yaml
@@ -1,6 +1,6 @@
 tests:
   message_bus.zbus.dyn_channel.static_and_dynamic_channels:
-    platform_exclude: fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp/ns
+    platform_exclude: fvp_base_revc_2xaem/v8a/smp/ns
     tags: zbus
     integration_platforms:
       - native_sim
diff --git a/tests/subsys/zbus/hlp_priority_boost/testcase.yaml b/tests/subsys/zbus/hlp_priority_boost/testcase.yaml
@@ -1,7 +1,7 @@
 tests:
   message_bus.zbus.hlp_priority_boost:
     platform_exclude:
-      - fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp/ns
+      - fvp_base_revc_2xaem/v8a/smp/ns
       # All Intel Audio DSP platforms have non-coherent cache
       # between CPUs. So the zbus_channel struct data goes
       # out-of-sync between CPUs with multiple producer and
diff --git a/tests/subsys/zbus/integration/testcase.yaml b/tests/subsys/zbus/integration/testcase.yaml
@@ -5,7 +5,7 @@ tests:
       - qemu_cortex_a9
       - hifive_unleashed/fu540/e51
       - hifive_unleashed/fu540/u54
-      - fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp/ns
+      - fvp_base_revc_2xaem/v8a/smp/ns
     tags: zbus
     integration_platforms:
       - native_sim
diff --git a/tests/subsys/zbus/unittests/testcase.yaml b/tests/subsys/zbus/unittests/testcase.yaml
@@ -1,6 +1,6 @@
 tests:
   message_bus.zbus.general_unittests:
-    platform_exclude: fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp/ns
+    platform_exclude: fvp_base_revc_2xaem/v8a/smp/ns
     tags: zbus
     integration_platforms:
       - native_sim
@@ -13,7 +13,7 @@ tests:
     extra_configs:
       - CONFIG_CMAKE_LINKER_GENERATOR=y
   message_bus.zbus.general_unittests_without_priority_boost:
-    platform_exclude: fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp/ns
+    platform_exclude: fvp_base_revc_2xaem/v8a/smp/ns
     tags: zbus
     integration_platforms:
       - native_sim
diff --git a/tests/subsys/zbus/user_data/testcase.yaml b/tests/subsys/zbus/user_data/testcase.yaml
@@ -1,6 +1,6 @@
 tests:
   message_bus.zbus.user_data.channel_user_data:
-    platform_exclude: fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp/ns
+    platform_exclude: fvp_base_revc_2xaem/v8a/smp/ns
     tags: zbus
     integration_platforms:
       - native_sim
diff --git a/tests/ztest/error_hook/src/main.c b/tests/ztest/error_hook/src/main.c
@@ -134,7 +134,7 @@ __no_optimization static void trigger_fault_divide_zero(void)
 	defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) || \
 	defined(CONFIG_BOARD_QEMU_CORTEX_R5) || \
 	defined(CONFIG_ARMV8_R) || defined(CONFIG_AARCH32_ARMV8_R) || \
-	defined(CONFIG_BOARD_FVP_BASE_REVC_2XAEMV8A) || \
+	defined(CONFIG_BOARD_FVP_BASE_REVC_2XAEM) || \
 	defined(CONFIG_SOC_NSIM_EM11D)
 	ztest_test_skip();
 #endif

-Original file line number
+Diff line change
@@ @@ -0,0 +1,6 @@ @@
 +/*
 + * Copyright (c) 2021 Carlo Caione <[email protected]>
 + * SPDX-License-Identifier: Apache-2.0
 + */
++
 +#include "fvp_base_revc_2xaem_v8a.dts"