dts: linker region properties

Jordan Yates · carlescufi · commit dcce5b1a7400 · 2021-12-09T16:23:03.000+01:00
Add `zephyr,linker-region` properties to all nodes sram1, sram2, sram3,
sram4, sdram1, sdram2, backup_sram, ti_ccfg, dtcm and itcm.

Signed-off-by: Jordan Yates &lt;jordan.yates@data61.csiro.au&gt;
diff --git a/boards/arm/arty/arty_a7_arm_designstart_m1.dts b/boards/arm/arty/arty_a7_arm_designstart_m1.dts
@@ -28,11 +28,13 @@
 		itcm: memory@0 {
 			compatible = "arm,itcm";
 			reg = <0x00000000 DT_SIZE_K(64)>;
+			zephyr,memory-region = "ITCM";
 		};
 
 		dtcm: memory@20000000 {
 			compatible = "arm,dtcm";
 			reg = <0x20000000 DT_SIZE_K(32)>;
+			zephyr,memory-region = "DTCM";
 		};
 
 		bram0: memory@60000000 {
diff --git a/boards/arm/arty/arty_a7_arm_designstart_m3.dts b/boards/arm/arty/arty_a7_arm_designstart_m3.dts
@@ -34,11 +34,13 @@
 		itcm: memory@0 {
 			compatible = "arm,itcm";
 			reg = <0x00000000 DT_SIZE_K(32)>;
+			zephyr,memory-region = "ITCM";
 		};
 
 		dtcm: memory@20000000 {
 			compatible = "arm,dtcm";
 			reg = <0x20000000 DT_SIZE_K(32)>;
+			zephyr,memory-region = "DTCM";
 		};
 
 		bram0: memory@60000000 {
diff --git a/boards/arm/mps2_an521/mps2_an521.dts b/boards/arm/mps2_an521/mps2_an521.dts
@@ -82,11 +82,13 @@
 	sram1: memory@10000000 {
 		compatible = "mmio-sram";
 		reg = <0x10000000 DT_SIZE_M(4)>;
+		zephyr,memory-region = "SRAM1";
 	};
 
 	sram2_3: memory@38000000 {
 		compatible = "mmio-sram";
 		reg = <0x38000000 DT_SIZE_M(4)>;
+		zephyr,memory-region = "SRAM2_3";
 	};
 
 	psram: memory@80000000 {
diff --git a/boards/arm/mps2_an521/mps2_an521_ns.dts b/boards/arm/mps2_an521/mps2_an521_ns.dts
@@ -82,11 +82,13 @@
 	sram1: memory@0 {
 		compatible = "mmio-sram";
 		reg = <0x0 DT_SIZE_M(4)>;
+		zephyr,memory-region = "SRAM1";
 	};
 
 	sram2_3: memory@28000000 {
 		compatible = "mmio-sram";
 		reg = <0x28000000 DT_SIZE_M(4)>;
+		zephyr,memory-region = "SRAM2_3";
 	};
 
 	psram: memory@80000000 {
diff --git a/boards/arm/mps2_an521/mps2_an521_remote.dts b/boards/arm/mps2_an521/mps2_an521_remote.dts
@@ -82,11 +82,13 @@
 	sram1: memory@0 {
 		compatible = "mmio-sram";
 		reg = <0x0 DT_SIZE_M(4)>;
+		zephyr,memory-region = "SRAM1";
 	};
 
 	sram2_3: memory@28000000 {
 		compatible = "mmio-sram";
 		reg = <0x28000000 DT_SIZE_M(4)>;
+		zephyr,memory-region = "SRAM2_3";
 	};
 
 	psram: memory@80000000 {
diff --git a/boards/arm/mps3_an547/mps3_an547.dts b/boards/arm/mps3_an547/mps3_an547.dts
@@ -109,6 +109,7 @@
 	 */
 	itcm: itcm@10000000 {	/* alias @ 0x0 */
 		reg = <0x10000000 DT_SIZE_K(512)>;
+		zephyr,memory-region = "ITCM";
 	};
 
 	sram: sram@11000000 {	/* alias @ 0x01000000 */
@@ -118,6 +119,7 @@
 
 	dtcm: dtcm@30000000 {	/* alias @ 0x20000000 */
 		reg = <0x30000000 DT_SIZE_K(512)>;
+		zephyr,memory-region = "DTCM";
 	};
 
 	isram: sram@31000000 {/* alias @ 0x21000000 */
diff --git a/boards/arm/stm32f429i_disc1/stm32f429i_disc1.dts b/boards/arm/stm32f429i_disc1/stm32f429i_disc1.dts
@@ -23,6 +23,7 @@
 	sdram2: sdram@d0000000 {
 		device_type = "memory";
 		reg = <0xd0000000 DT_SIZE_M(8)>;
+		zephyr,memory-region = "SDRAM2";
 	};
 
 	leds {
diff --git a/boards/arm/stm32h747i_disco/stm32h747i_disco_m7.dts b/boards/arm/stm32h747i_disco/stm32h747i_disco_m7.dts
@@ -24,6 +24,7 @@
 	sdram2: sdram@d0000000 {
 		device_type = "memory";
 		reg = <0xd0000000 DT_SIZE_M(32)>;
+		zephyr,memory-region = "SDRAM2";
 	};
 
 	leds {
diff --git a/dts/arm/atmel/sam4l.dtsi b/dts/arm/atmel/sam4l.dtsi
@@ -48,6 +48,7 @@
 	sram1: memory@21000000 {
 		compatible = "mmio-sram";
 		reg = <0x21000000 DT_SIZE_K(4)>;
+		zephyr,memory-region = "SRAM1";
 	};
 
 	soc {
diff --git a/dts/arm/cypress/psoc6.dtsi b/dts/arm/cypress/psoc6.dtsi
@@ -59,11 +59,13 @@
 	sram1: memory@8023000 {
 		compatible = "mmio-sram";
 		reg = <0x08023000 DT_SIZE_K(4)>;
+		zephyr,memory-region = "SRAM1";
 	};
 
 	sram2: memory@8024000 {
 		compatible = "mmio-sram";
 		reg = <0x08024000 DT_SIZE_K(112)>;
+		zephyr,memory-region = "SRAM2";
 	};
 
 	soc {
diff --git a/dts/arm/nordic/nrf5340_cpunet.dtsi b/dts/arm/nordic/nrf5340_cpunet.dtsi
@@ -50,6 +50,7 @@
 
 		sram1: memory@21000000 {
 			compatible = "mmio-sram";
+			zephyr,memory-region = "SRAM1";
 		};
 
 		clock: clock@41005000 {
diff --git a/dts/arm/nxp/nxp_lpc11u6x.dtsi b/dts/arm/nxp/nxp_lpc11u6x.dtsi
@@ -26,11 +26,13 @@
 	sram1:memory@20000000 {
 		compatible = "mmio-sram";
 		reg = <0x20000000 0x800>;
+		zephyr,memory-region = "SRAM1";
 	};
 
 	sram2:memory@20004000 {
 		compatible = "mmio-sram";
 		reg = <0x20004000 0x800>;
+		zephyr,memory-region = "SRAM2";
 	};
 
 	soc {
diff --git a/dts/arm/nxp/nxp_lpc54xxx.dtsi b/dts/arm/nxp/nxp_lpc54xxx.dtsi
@@ -52,11 +52,13 @@
 		sram1:memory@20010000 {
 			compatible = "mmio-sram";
 			reg = <0x20010000 DT_SIZE_K(64)>;
+			zephyr,memory-region = "SRAM1";
 		};
 
 		sram2:memory@20020000 {
 			compatible = "mmio-sram";
 			reg = <0x20020000 DT_SIZE_K(32)>;
+			zephyr,memory-region = "SRAM2";
 		};
 
 		sramx:memory@4000000{
diff --git a/dts/arm/nxp/nxp_lpc55S1x_common.dtsi b/dts/arm/nxp/nxp_lpc55S1x_common.dtsi
@@ -47,17 +47,20 @@
 	sram1: memory@20008000 {
 		compatible = "mmio-sram";
 		reg = <0x20008000 DT_SIZE_K(16)>;
+		zephyr,memory-region = "SRAM1";
 	};
 
 	sram2: memory@2000c000 {
 		compatible = "mmio-sram";
 		reg = <0x2000c000 DT_SIZE_K(16)>;
+		zephyr,memory-region = "SRAM2";
 	};
 
 	sram4: memory@20010000 {
 		/* Conencted to USB bus*/
 		compatible = "mmio-sram";
 		reg = <0x20010000 DT_SIZE_K(16)>;
+		zephyr,memory-region = "SRAM4";
 	};
 };
 
diff --git a/dts/arm/nxp/nxp_lpc55S2x_common.dtsi b/dts/arm/nxp/nxp_lpc55S2x_common.dtsi
@@ -55,16 +55,19 @@
 	sram1: memory@20010000 {
 		compatible = "mmio-sram";
 		reg = <0x20010000 DT_SIZE_K(64)>;
+		zephyr,memory-region = "SRAM1";
 	};
 
 	sram2: memory@20020000 {
 		compatible = "mmio-sram";
 		reg = <0x20020000 DT_SIZE_K(64)>;
+		zephyr,memory-region = "SRAM2";
 	};
 
 	sram4: memory@20040000 {
 		compatible = "mmio-sram";
 		reg = <0x20040000 DT_SIZE_K(16)>;
+		zephyr,memory-region = "SRAM4";
 	};
 };
 
diff --git a/dts/arm/nxp/nxp_lpc55S6x_common.dtsi b/dts/arm/nxp/nxp_lpc55S6x_common.dtsi
@@ -59,21 +59,25 @@
 	sram1: memory@20010000 {
 		compatible = "mmio-sram";
 		reg = <0x20010000 DT_SIZE_K(32)>;
+		zephyr,memory-region = "SRAM1";
 	};
 
 	sram2: memory@20018000 {
 		compatible = "mmio-sram";
 		reg = <0x20018000 DT_SIZE_K(32)>;
+		zephyr,memory-region = "SRAM2";
 	};
 
 	sram3: memory@20020000 {
 		compatible = "mmio-sram";
 		reg = <0x20020000 DT_SIZE_K(32)>;
+		zephyr,memory-region = "SRAM3";
 	};
 
 	sram4: memory@40100000 {
 		compatible = "mmio-sram";
 		reg = <0x40100000 DT_SIZE_K(16)>;
+		zephyr,memory-region = "SRAM4";
 	};
 };
 
diff --git a/dts/arm/nxp/nxp_rt.dtsi b/dts/arm/nxp/nxp_rt.dtsi
@@ -52,11 +52,13 @@
 			itcm: itcm@0 {
 				compatible = "nxp,imx-itcm";
 				reg = <0x00000000 DT_SIZE_K(128)>;
+				zephyr,memory-region = "ITCM";
 			};
 
 			dtcm: dtcm@20000000 {
 				compatible = "nxp,imx-dtcm";
 				reg = <0x20000000 DT_SIZE_K(128)>;
+				zephyr,memory-region = "DTCM";
 			};
 
 			ocram: ocram@20200000 {
diff --git a/dts/arm/nxp/nxp_rt1170_cm4.dtsi b/dts/arm/nxp/nxp_rt1170_cm4.dtsi
@@ -28,6 +28,7 @@
 		sram1: memory@20000000 {
 			compatible = "mmio-sram";
 			reg = <0x20000000 DT_SIZE_K(128)>;
+			zephyr,memory-region = "SRAM1";
 		};
 
 		/*
diff --git a/dts/arm/nxp/nxp_rt1170_cm7.dtsi b/dts/arm/nxp/nxp_rt1170_cm7.dtsi
@@ -29,11 +29,13 @@
 			itcm: itcm@0 {
 				compatible = "nxp,imx-itcm";
 				reg = <0x00000000 DT_SIZE_K(256)>;
+				zephyr,memory-region = "ITCM";
 			};
 
 			dtcm: dtcm@20000000 {
 				compatible = "nxp,imx-dtcm";
 				reg = <0x20000000 DT_SIZE_K(256)>;
+				zephyr,memory-region = "DTCM";
 			};
 		};
 
diff --git a/dts/arm/st/f2/stm32f2.dtsi b/dts/arm/st/f2/stm32f2.dtsi
@@ -553,6 +553,7 @@
 			reg = <0x40024000 DT_SIZE_K(4)>;
 			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00040000>;
 			label = "BACKUP_SRAM";
+			zephyr,memory-region = "BACKUP_SRAM";
 			status = "disabled";
 		};
 	};
diff --git a/dts/arm/st/f4/stm32f405.dtsi b/dts/arm/st/f4/stm32f405.dtsi
@@ -227,6 +227,7 @@
 			reg = <0x40024000 DT_SIZE_K(4)>;
 			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00040000>;
 			label = "BACKUP_SRAM";
+			zephyr,memory-region = "BACKUP_SRAM";
 			status = "disabled";
 		};
 
diff --git a/dts/arm/st/f4/stm32f446.dtsi b/dts/arm/st/f4/stm32f446.dtsi
@@ -108,6 +108,7 @@
 			reg = <0x40024000 DT_SIZE_K(4)>;
 			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00040000>;
 			label = "BACKUP_SRAM";
+			zephyr,memory-region = "BACKUP_SRAM";
 			status = "disabled";
 		};
 
diff --git a/dts/arm/st/f7/stm32f7.dtsi b/dts/arm/st/f7/stm32f7.dtsi
@@ -743,6 +743,7 @@
 			reg = <0x40024000 DT_SIZE_K(4)>;
 			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00040000>;
 			label = "BACKUP_SRAM";
+			zephyr,memory-region = "BACKUP_SRAM";
 			status = "disabled";
 		};
 
diff --git a/dts/arm/st/f7/stm32f723.dtsi b/dts/arm/st/f7/stm32f723.dtsi
@@ -17,6 +17,7 @@
 	dtcm: memory@20000000 {
 		compatible = "arm,dtcm";
 		reg = <0x20000000 DT_SIZE_K(64)>;
+		zephyr,memory-region = "DTCM";
 	};
 
 	soc {
diff --git a/dts/arm/st/f7/stm32f745.dtsi b/dts/arm/st/f7/stm32f745.dtsi
@@ -17,6 +17,7 @@
 	dtcm: memory@20000000 {
 		compatible = "arm,dtcm";
 		reg = <0x20000000 DT_SIZE_K(64)>;
+		zephyr,memory-region = "DTCM";
 	};
 
 	soc {
diff --git a/dts/arm/st/f7/stm32f767.dtsi b/dts/arm/st/f7/stm32f767.dtsi
@@ -19,6 +19,7 @@
 	dtcm: memory@20000000 {
 		compatible = "arm,dtcm";
 		reg = <0x20000000 DT_SIZE_K(128)>;
+		zephyr,memory-region = "DTCM";
 	};
 
 	soc {
diff --git a/dts/arm/st/h7/stm32h7.dtsi b/dts/arm/st/h7/stm32h7.dtsi
@@ -837,6 +837,7 @@
 			reg = <0x38800000 DT_SIZE_K(4)>;
 			clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x10000000>;
 			label = "BACKUP_SRAM";
+			zephyr,memory-region = "BACKUP_SRAM";
 			status = "disabled";
 		};
 	};
diff --git a/dts/arm/st/h7/stm32h723.dtsi b/dts/arm/st/h7/stm32h723.dtsi
@@ -41,6 +41,7 @@
 	dtcm: memory@20000000 {
 		compatible = "arm,dtcm";
 		reg = <0x20000000 DT_SIZE_K(128)>;
+		zephyr,memory-region = "DTCM";
 	};
 
 	/* AXI SRAM in D1 domain (AXI bus) */
diff --git a/dts/arm/st/h7/stm32h735.dtsi b/dts/arm/st/h7/stm32h735.dtsi
@@ -56,22 +56,26 @@
 	sram1: memory@30000000 {
 		reg = <0x30000000 DT_SIZE_K(16)>;
 		compatible = "mmio-sram";
+		zephyr,memory-region = "SRAM1";
 	};
 
 	/* System data RAM accessible over AHB bus: SRAM2 in D2 domain */
 	sram2: memory@30040000 {
 		reg = <0x30040000 DT_SIZE_K(16)>;
 		compatible = "mmio-sram";
+		zephyr,memory-region = "SRAM2";
 	};
 
 	/* System data RAM accessible over AHB bus: SRAM4 in D3 domain  */
 	sram4: memory@38000000 {
 		reg = <0x38000000 DT_SIZE_K(16)>;
 		compatible = "mmio-sram";
+		zephyr,memory-region = "SRAM4";
 	};
 
 	dtcm: memory@20000000 {
 		compatible = "arm,dtcm";
 		reg = <0x20000000 DT_SIZE_K(128)>;
+		zephyr,memory-region = "DTCM";
 	};
 };
diff --git a/dts/arm/st/h7/stm32h743.dtsi b/dts/arm/st/h7/stm32h743.dtsi
@@ -44,29 +44,34 @@
 	sram1: memory@30000000 {
 		reg = <0x30000000 DT_SIZE_K(128)>;
 		compatible = "mmio-sram";
+		zephyr,memory-region = "SRAM1";
 	};
 
 	/* System data RAM accessible over AHB bus: SRAM2 in D2 domain */
 	sram2: memory@30020000 {
 		compatible = "mmio-sram";
 		reg = <0x30020000 DT_SIZE_K(128)>;
+		zephyr,memory-region = "SRAM2";
 	};
 
 	/* System data RAM accessible over AHB bus: SRAM3 in D2 domain */
 	sram3: memory@30040000 {
 		compatible = "mmio-sram";
 		reg = <0x30040000 DT_SIZE_K(32)>;
+		zephyr,memory-region = "SRAM3";
 	};
 
 	/* System data RAM accessible over AHB bus: SRAM4 in D3 domain  */
 	sram4: memory@38000000 {
 		reg = <0x38000000 DT_SIZE_K(64)>;
 		compatible = "mmio-sram";
+		zephyr,memory-region = "SRAM4";
 	};
 
 	dtcm: memory@20000000 {
 		compatible = "arm,dtcm";
 		reg = <0x20000000 DT_SIZE_K(128)>;
+		zephyr,memory-region = "DTCM";
 	};
 
 	otghs_fs_phy: otghs_fs_phy {
diff --git a/dts/arm/st/h7/stm32h745.dtsi b/dts/arm/st/h7/stm32h745.dtsi
diff --git a/dts/arm/st/h7/stm32h745Xi_m7.dtsi b/dts/arm/st/h7/stm32h745Xi_m7.dtsi
diff --git a/dts/arm/st/h7/stm32h750.dtsi b/dts/arm/st/h7/stm32h750.dtsi
diff --git a/dts/arm/st/wb/stm32wb.dtsi b/dts/arm/st/wb/stm32wb.dtsi
diff --git a/dts/arm/ti/cc1352r.dtsi b/dts/arm/ti/cc1352r.dtsi
diff --git a/dts/arm/ti/cc13x2_cc26x2.dtsi b/dts/arm/ti/cc13x2_cc26x2.dtsi
diff --git a/dts/arm/ti/cc2652r.dtsi b/dts/arm/ti/cc2652r.dtsi
diff --git a/dts/arm/xilinx/zynq7000.dtsi b/dts/arm/xilinx/zynq7000.dtsi
